EPM2210GF256I5N Altera, EPM2210GF256I5N Datasheet - Page 52

• Manufacturer Part Number: EPM2210GF256I5N
• Description: MAX II
• Manufacturer: Altera

IEEE Std. 1149.1 (JTAG) Boundary-Scan Support
3–2
MAX II Device Handbook, Volume 1
Notes to
(1)
(2)
USERCODE
IDCODE
HIGHZ
CLAMP
USER0
USER1
IEEE 1532 instructions
Table 3–1. MAX II JTAG Instructions (Part 2 of 2)
JTAG Instruction
HIGHZ, CLAMP, and EXTEST instructions do not disable weak pull-up resistors or bus hold features.
These instructions are shown in the 1532 BSDL files, which will be posted on the Altera
www.altera.com
(1)
(1)
Table
3–1:
when they are available.
Instruction Code
00 0000 0111
00 0000 0110
00 0000 1011
00 0000 1010
00 0000 1100
00 0000 1110
w
(2)
Core Version a.b.c variable
Unsupported JTAG instructions should not be issued to the
MAX II device as this may put the device into an unknown state,
requiring a power cycle to recover device operation.
Selects the 32-bit USERCODE register and places it between
the TDI and TDO pins, allowing the USERCODE to be serially
shifted out of TDO. This register defaults to all 1’s if not
specified in the Quartus II software.
Selects the IDCODE register and places it between TDI and
TDO, allowing the
Places the 1-bit bypass register between the TDI and TDO
pins, which allows the boundary scan test data to pass
synchronously through selected devices to adjacent devices
during normal device operation, while tri-stating all of the I/O
pins.
Places the 1-bit bypass register between the TDI and TDO
pins, which allows the boundary scan test data to pass
synchronously through selected devices to adjacent devices
during normal device operation, while holding I/O pins to a
state defined by the data in the boundary-scan register.
This instruction allows you to define the scan chain between
TDI and TDO in the MAX II logic array. This instruction is also
used for custom logic and JTAG interfaces.
This instruction allows you to define the scan chain between
TDI and TDO in the MAX II logic array. This instruction is also
used for custom logic and JTAG interfaces.
IEEE 1532 ISC instructions used when programming a MAX II
device via the JTAG port.
IDCODE
Description
to be serially shifted out of TDO.
®
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Altera Corporation
December 2007