EPM2210GF256I5N Altera, EPM2210GF256I5N Datasheet - Page 48

• Manufacturer Part Number: EPM2210GF256I5N
• Description: MAX II
• Manufacturer: Altera

I/O Structure
2–40Core Version a.b.c variable
MAX II Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Table 2–7. MAX II MultiVolt I/O Support
V
CCIO
1.5
1.8
2.5
3.3
To drive inputs higher than V
However, to drive 5.0-V inputs to the device, enable the PCI clamping diode to prevent V
When V
When V
When V
than expected.
MAX II devices can be 5.0-V tolerant with the use of an external resistor and the internal PCI clamp diode on the
EPM1270 and EPM2210 devices.
When V
When V
case of 5.0-V CMOS, open-drain setting with internal PCI clamp diode (available only on EPM1270 and EPM2210
devices) and external resistor is required.
(V)
Table
CCIO
CCIO
CCIO
CCIO
CCIO
1.5 V
v
v
—
—
2–7:
= 1.8 V, a MAX II device can drive a 1.5-V device with 1.8-V tolerant inputs.
= 2.5 V, a MAX II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
= 3.3 V and a 2.5-V input signal feeds an input pin, the VCCIO supply current will be slightly larger
= 3.3 V, a MAX II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
= 3.3 V, a MAX II device can drive a device with 5.0-V TTL inputs but not 5.0-V CMOS inputs. In the
f
1.8 V
v
v
—
—
MultiVolt I/O Interface
The MAX II architecture supports the MultiVolt I/O interface feature,
which allows MAX II devices in all packages to interface with systems of
different supply voltages. The devices have one set of VCC pins for
internal operation (V
output driver buffers (V
available in the devices where each set of VCC pins powers one I/O bank.
The EPM240 and EPM570 devices have two I/O banks respectively while
the EPM1270 and EPM2210 devices have four I/O banks respectively.
Connect VCCIO pins to either a 1.5-V, 1.8 V, 2.5-V, or 3.3-V power supply,
depending on the output requirements. The output levels are compatible
with systems of the same voltage as the power supply (that is, when
VCCIO pins are connected to a 1.5-V power supply, the output levels are
compatible with 1.5-V systems). When VCCIO pins are connected to a
3.3-V power supply, the output high is 3.3 V and is compatible with 3.3-V
or 5.0-V systems.
For information about output pin source and sink current guidelines,
refer to the
Input Signal
CCIO
v
2.5 V
v
v
v
(4)
but less than 4.0 V including the overshoot, disable the PCI clamping diode.
AN 428: MAX II CPLD Design
Note (1)
3.3 V
v
v
v
v
Table 2–7
CCINT
v
5.0 V
—
—
—
(5)
CCIO
), and up to four sets for input buffers and I/O
summarizes MAX II MultiVolt I/O support.
), depending on the number of I/O banks
v
v
v
1.5 V
v
(2)
(3)
(6)
v
v
1.8 V
v
—
Guidelines.
(3)
(6)
Output Signal
v
2.5 V
v
—
—
(6)
I
from rising above 4.0 V.
Altera Corporation
3.3 V
v
—
—
—
March 2008
v
5.0 V
—
—
—
(7)