EPM2210GF256I5N Altera, EPM2210GF256I5N Datasheet - Page 82

• Manufacturer Part Number: EPM2210GF256I5N
• Description: MAX II
• Manufacturer: Altera

Timing Model and Specifications
5–12Core Version a.b.c variable
MAX II Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
(4)
(5)
LE
UFM
Resource
Table 5–14. MAX II Device Performance
Used
This design is a binary loadable up counter.
This design is configured for read-only operation in Extended mode. Read and write ability increases the number
of LEs used.
This design is configured for read-only operation. Read and write ability increases the number of LEs used.
This design is asynchronous.
The I
Table
2
C megafunction is verified in hardware up to 100-kHz serial clock line (SCL) rate.
16-bit counter
64-bit counter
16-to-1
multiplexer
32-to-1
multiplexer
16-bit XOR
function
16-bit decoder
with single
address line
512 × 16
512 × 16
512 × 8
512 × 16
Design Size and
5–14:
Function
(1)
(1)
Performance
Table 5–14
designs. All performance values were obtained with the Quartus II
software compilation of megafunctions. Performance values for –3, –4,
and –5 speed grades are based on an EPM1270 device target while –6 and
–7 speed grades are based on an EPM570Z device target.
None
SPI
Parallel
(3)
I
2
Mode
C
—
—
—
—
—
—
(3)
Resources Used
(2)
shows the MAX II device performance for some common
LEs
142
16
64
11
24
37
73
5
5
3
Blocks
UFM
0
0
0
0
0
0
1
1
1
1
100
Speed
Grade
304.0
201.5
10.0
6.0
7.1
5.1
5.2
8.0
(4)
–3
(5)
100
Speed
Grade
247.5
154.8
10.0
8.0
9.0
6.6
6.6
8.0
(4)
–4
(5)
Performance
100
Speed
Grade
201.1
125.8
11.4
10.0
9.3
8.2
8.2
8.0
–5
(4)
(5)
100
Speed
Grade
184.1
83.2
17.4
12.5
10.0
9.0
9.2
9.7
–6
(4)
(5)
Altera Corporation
100
Speed
Grade
123.5
83.2
17.3
22.8
15.0
15.0
10.0
9.7
–7
(4)
(5)
July 2008
MHz
MHz
MHz
MHz
MHz
Unit
kHz
ns
ns
ns
ns