LAN9311-NZW Standard Microsystems (SMSC), LAN9311-NZW Datasheet - Page 195

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LAN9311-NZW

Manufacturer Part Number
LAN9311-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9311-NZW

Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9311-NZW
Manufacturer:
Standard
Quantity:
2
Part Number:
LAN9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.3.2
31:28
27:16
15:12
BITS
11:0
RESERVED
GPIO Direction 11-0 (GPIODIR[11:0])
These bits set the input/output direction of the 12 GPIO pins.
0: GPIO pin is configured as an input
1: GPIO pin is configured as an output
RESERVED
GPIO Data 11-0 (GPIOD[11:0])
When a GPIO pin is enabled as an output, the value written to this field is
output on the corresponding GPIO pin. Upon a read, the value returned
depends on the current direction of the pin. If the pin is an input, the data
reflects the current state of the corresponding GPIO pin. If the pin is an
output, the data is the value that was last written into this register. For
GPIOs 11-10 and 7-0, the pin direction is determined by the GPDIR bits of
this register. For GPIOs 9 and 8, the pin direction is determined by the
GPDIR bits and the 1588_GPIO_OE bits in the
Configuration Register
General Purpose I/O Data & Direction Register (GPIO_DATA_DIR)
This read/write register configures the direction of the 12 GPIO pins and contains the GPIO input and
output data bits.
Offset:
(GPIO_CFG).
1E4h
DESCRIPTION
DATASHEET
195
General Purpose I/O
Size:
32 bits
TYPE
R/W
R/W
RO
RO
Revision 1.7 (06-29-10)
DEFAULT
0h
0h
-
-

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