LAN9311-NZW Standard Microsystems (SMSC), LAN9311-NZW Datasheet - Page 277

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LAN9311-NZW

Manufacturer Part Number
LAN9311-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9311-NZW

Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9311-NZW
Manufacturer:
Standard
Quantity:
2
Part Number:
LAN9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.3.4
BITS
31:0
Upper 32-bits of the 64-bit Hash Table
Host MAC Multicast Hash Table High Register (HMAC_HASHH)
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the
destination address in the incoming frame is used to index the contents of the Hash table. The most
significant bit determines the register to be used (Hi/Low), while the other five bits determine the bit
within the register. A value of 00000 selects Bit 0 of the Multicast Hash Table Lo register and a value
of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All
Multicast” (MCPAS) bit of the
accepted regardless of the multicast hash values.
The Multicast Hash Table High register contains the higher 32 bits of the hash table and the Multicast
Hash Table Low register contains the lower 32 bits of the hash table. Refer to
Filtering," on page 115
This table determines if the Host MAC accepts the packets from the switch fabric. The switch fabric
address table and configuration determine the packets that get sent to the Host MAC.
Offset:
for more information on address filtering.
4h
DESCRIPTION
Host MAC Control Register (HMAC_CR)
DATASHEET
277
Size:
32 bits
is set, then all multicast frames are
TYPE
R/W
Section 9.4, "Address
Revision 1.7 (06-29-10)
00000000h
DEFAULT

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