LAN9311-NZW Standard Microsystems (SMSC), LAN9311-NZW Datasheet - Page 247

• Manufacturer Part Number: LAN9311-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9311-NZW

• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.8.1
31:16
BITS
15
14
13
12
11
10
9
8
RESERVED
(See
Reset (VPHY_RST)
When set, this bit resets all the Virtual PHY registers to their default state.
This bit is self clearing.
0: Normal Operation
1: Reset
Loopback (VPHY_LOOPBACK)
This bit enables/disables the loopback mode. When enabled, transmissions
from the Host MAC are not sent to the switch fabric. Instead, they are looped
back onto the receive path.
0: Loopback mode disabled (normal operation)
1: Loopback mode enabled
Speed Select LSB (VPHY_SPEED_SEL_LSB)
This bit is used to set the speed of the Virtual PHY when the
Negotiation (VPHY_AN)
0: 10 Mbps
1: 100 Mbps
Auto-Negotiation (VPHY_AN)
This bit enables/disables Auto-Negotiation. When enabled, the
LSB (VPHY_SPEED_SEL_LSB)
are overridden.
0: Auto-Negotiation disabled
1: Auto-Negotiation enabled
Power Down (VPHY_PWR_DWN)
This bit is not used by the Virtual PHY and has no effect.
Isolate (VPHY_ISO)
This bit is not used by the Virtual PHY and has no effect.
Restart Auto-Negotiation (VPHY_RST_AN)
When set, this bit updates the emulated Auto-Negotiation results.
0: Normal operation
1: Auto-Negotiation restarted
Duplex Mode (VPHY_DUPLEX)
This bit is used to set the duplex when the
is disabled.
0: Half Duplex
1: Full Duplex
Virtual PHY Basic Control Register (VPHY_BASIC_CTRL)
This read/write register is used to configure the Virtual PHY.
Note: This register is re-written in its entirety by the EEPROM Loader following the release or reset
Note
or a RELOAD command. Refer to
information.
14.16)
Offset:
Index (decimal):
bit is disabled.
1C0h
0
DESCRIPTION
and
Duplex Mode (VPHY_DUPLEX)
DATASHEET
Auto-Negotiation (VPHY_AN)
247
Section 10.2.4, "EEPROM Loader," on page 150
Size:
Speed Select
Auto-
32 bits
bits
bit
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
SC
SC
Revision 1.7 (06-29-10)
DEFAULT
0b
0b
0b
1b
0b
0b
0b
0b
for more
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