82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 191

• Manufacturer Part Number: 82P2284BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2284BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

T1/J1 IBCD Detector Status (077H, 177H, 277H, 377H)
LBA:
LBD:
T1/J1 IBCD Activate Code (078H, 178H, 278H, 378H)
ACT[7:0]:
ASEL[1:0] bits (b1~0, T1/J1-076H,...). The unused bits should be ignored. The ACT[7] bit is the MSB and compares with the first received code bit.
T1/J1 IBCD Deactivate Code (079H, 179H, 279H, 379H)
DACT[7:0]:
DSEL[1:0] bits (b3~2, T1/J1-076H,...). The unused bits should be ignored. The DACT[7] bit is the MSB and compares with the first received code bit.
Programming Information
IDT82P2284
Bit Name
Bit Name
Bit Name
= 0: The activate code is loss. That is, more than 600 bits are not matched with the target activate inband loopback code in a 39.8ms fixed period.
= 1: The activate code is detected. That is, in more than 126 consecutive 39.8ms fixed periods, the target activate inband loopback code is
matched with less than 600 bit errors in each 39.8ms.
= 0: The deactivate code is loss. That is, more than 600 bits are not matched with the target deactivate inband loopback code in a 39.8ms fixed
period.
= 1: The deactivate code is detected. That is, in more than 126 consecutive 39.8ms fixed periods, the target deactivate inband loopback code is
matched with less than 600 bit errors in each 39.8ms.
The ACT[7:X] bits define the content of the target activate inband loopback code. The ‘X’ is 3, 2, 1 or 0 which depends on the definition by the
The DACT[7:X] bits define the content of the target deactivate inband loopback code. The ‘X’ is 3, 2, 1 or 0 which depends on the definition by the
Default
Default
Default
Bit No.
Bit No.
Bit No.
Type
Type
Type
DACT7
ACT7
R/W
R/W
7
7
0
7
0
DACT6
ACT6
R/W
R/W
6
6
0
6
0
DACT5
ACT5
R/W
R/W
5
5
0
5
1
Reserved
DACT4
ACT4
R/W
R/W
4
4
0
4
0
191
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
DACT3
ACT3
R/W
R/W
3
3
1
3
0
DACT2
ACT2
R/W
R/W
2
2
0
2
1
DACT1
ACT1
R/W
R/W
LBA
R
1
0
1
0
1
0
February 25, 2008
DACT0
ACT0
LBD
R/W
R/W
R
0
0
0
0
0
0