82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 5

• Manufacturer Part Number: 82P2284BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2284BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

4 OPERATION .................................................................................................................................................................. 116
5 PROGRAMMING INFORMATION ................................................................................................................................. 119
6 IEEE STD 1149.1 JTAG TEST ACCESS PORT ........................................................................................................... 340
Table of Contents
IDT82P2284
3.24 WAVEFORM SHAPER / LINE BUILD OUT ............................................................................................................................................... 101
3.25 LINE DRIVER ............................................................................................................................................................................................. 110
3.26 TRANSMITTER IMPEDANCE MATCHING ............................................................................................................................................... 110
3.27 TESTING AND DIAGNOSTIC FACILITIES ............................................................................................................................................... 110
3.28 INTERRUPT SUMMARY ............................................................................................................................................................................ 114
4.1 POWER-ON SEQUENCE ........................................................................................................................................................................... 116
4.2 RESET ........................................................................................................................................................................................................ 116
4.3 RECEIVE / TRANSMIT PATH POWER DOWN ......................................................................................................................................... 116
4.4 MICROPROCESSOR INTERFACE ........................................................................................................................................................... 116
4.5 INDIRECT REGISTER ACCESS SCHEME ............................................................................................................................................... 118
5.1 REGISTER MAP ......................................................................................................................................................................................... 119
5.2 REGISTER DESCRIPTION ........................................................................................................................................................................ 135
6.1 JTAG INSTRUCTIONS AND INSTRUCTION REGISTER (IR) .................................................................................................................. 340
6.2 JTAG DATA REGISTER ............................................................................................................................................................................ 341
6.3 TEST ACCESS PORT CONTROLLER ...................................................................................................................................................... 344
3.24.1 Preset Waveform Template ......................................................................................................................................................... 101
3.24.2 Line Build Out (LBO) (T1 Only) ................................................................................................................................................... 102
3.24.3 User-Programmable Arbitrary Waveform .................................................................................................................................. 102
3.27.1 PRBS Generator / Detector ......................................................................................................................................................... 110
3.27.2 Loopback ...................................................................................................................................................................................... 112
3.27.3 G.772 Non-Intrusive Monitoring .................................................................................................................................................. 112
4.4.1
4.4.2
4.5.1
4.5.2
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
3.24.1.1 T1/J1 Mode .................................................................................................................................................................... 101
3.24.1.2 E1 Mode ......................................................................................................................................................................... 102
3.27.1.1 Pattern Generator ........................................................................................................................................................... 110
3.27.1.2 Pattern Detector ............................................................................................................................................................. 111
3.27.2.1 System Loopback ........................................................................................................................................................... 112
3.27.2.2 Payload Loopback .......................................................................................................................................................... 112
3.27.2.3 Local Digital Loopback 1 ................................................................................................................................................ 112
3.27.2.4 Remote Loopback .......................................................................................................................................................... 112
3.27.2.5 Local Digital Loopback 2 ................................................................................................................................................ 112
3.27.2.6 Analog Loopback ............................................................................................................................................................ 112
SPI Mode ....................................................................................................................................................................................... 117
Parallel Microprocessor Interface .............................................................................................................................................. 117
Indirect Register Read Access ................................................................................................................................................... 118
Indirect Register Write Access ................................................................................................................................................... 118
T1/J1 Mode .................................................................................................................................................................................... 119
5.1.1.1
5.1.1.2
E1 Mode ........................................................................................................................................................................................ 127
5.1.2.1
5.1.2.2
T1/J1 Mode .................................................................................................................................................................................... 136
5.2.1.1
5.2.1.2
E1 Mode ........................................................................................................................................................................................ 237
5.2.2.1
5.2.2.2
Device Identification Register (IDR) ........................................................................................................................................... 341
Bypass Register (BYP) ................................................................................................................................................................ 341
Boundary Scan Register (BSR) ................................................................................................................................................... 341
Direct Register ................................................................................................................................................................ 119
Indirect Register ............................................................................................................................................................. 126
Direct Register ................................................................................................................................................................ 127
Indirect Register ............................................................................................................................................................. 133
Direct Register ................................................................................................................................................................ 136
Indirect Register ............................................................................................................................................................. 229
Direct Register ................................................................................................................................................................ 237
Indirect Register ............................................................................................................................................................. 330
5
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
February 25, 2008