82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 234

• Manufacturer Part Number: 82P2284BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2284BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

T1/J1 Data Trunk Conditioning Code Register (21H ~ 38H)
DTRK[7:0]:
SUBST[2:0] bits (b7~5, T1/J1-ID-01~18H).
T1/J1 Signaling Trunk Conditioning Code Register (41H ~ 58H)
TEST:
are searched for. Similarly, all the channels set to be replaced with the PRBS Generator/Detector test pattern data are concatenated replaced by the
PRBS.
STRKEN:
A, B, C, D:
STRKEN bit (b4, T1/J1-ID-41~58H).
TPLC:
channel.
sponds to one channel.
The indirect registers of TPLC addressed from 41H to 58H are the Signaling Trunk Conditioning Code Registers for CH1 to CH24. Each address
corresponds to one channel.
Programming Information
IDT82P2284
Bit Name
Bit Name
These bits are the data trunk code that can replace the data of the channel selected by the GSUBST[2:0] bits (b2~0, T1/J1-0D0H,...) or the
This bit is valid in 8-bit-based mode or in 7-bit-based mode selected by the PRBSMODE[1:0] bits (b3~2, T1/J1-0C7H,...).
= 0: Disable the data in the corresponding channel to be tested by the PRBS Generator/Detector.
= 1: Enable the data in the corresponding channel to be extracted to the PRBS Generator/Detector for test (when the PRBSDIR bit (b1, T1/J1-
0C7H,...) is ‘0’); or enable the test pattern from the PRBS Generator/Detector to replace the data in the corresponding channel for test (when the
PRBSDIR bit (b1, T1/J1-0C7H,...) is ‘1’). In 8-bit-based mode, the data refers to all 8 bits. In 7-bit-based mode, the data refers to the 7 MSB.
All the channels that are extracted to the PRBS Generator/Detector are concatenated and treated as a continuous stream in which pseudo random
= 0: No operation.
= 1: The data of the corresponding channel is replaced by the signaling trunk code set in the A, B, C, D bits (b3~0, T1/J1-ID-41~58H).
These bits are the signaling trunk code that can replace the signaling bits of the channel selected by the GSTRKEN bit (b6, T1/J1-0D0H,...) or the
The indirect registers of TPLC addressed from 01H to 18H are the Channel Control Registers for CH1 to CH24. Each address corresponds to one
The indirect registers of TPLC addressed from 21H to 38H are the Data Trunk Conditioning Code Registers for CH1 to CH24. Each address corre-
Default
Default
Bit No.
Bit No.
Type
Type
Reserved
DTRK7
R/W
7
0
7
DTRK6
TEST
R/W
R/W
6
0
6
0
Reserved
DTRK5
R/W
5
0
5
STRKEN
DTRK4
R/W
R/W
4
0
4
0
234
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
DTRK3
R/W
R/W
A
3
0
3
0
DTRK2
R/W
R/W
B
2
0
2
0
DTRK1
R/W
R/W
C
1
0
1
0
February 25, 2008
DTRK0
R/W
R/W
D
0
0
0
0