82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 58

• Manufacturer Part Number: 82P2284BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2284BB

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

3.10 ALARM DETECTOR
3.10.1 T1/J1 MODE
block (refer to Table 26).
Table 26: RED Alarm, Yellow Alarm & Blue Alarm Criteria
Functional Description
IDT82P2284
Note: * The Yellow Alarm can only be detected when the frame is synchronized.
Yellow
Alarm*
The RED alarm, Yellow alarm and Blue alarm are detected in this
(per T1.403,
(per T1.231)
Blue Alarm
RED Alarm
T1.231)
Format
T1 ESF
Format
Format
Format
J1 ESF
Format
T1 SF/
T1 DM
J1 SF
SLC-
96
The out of SF/ESF/T1 DM/SLC-96 syn-
chronization status persists Nx40 ms.
Here ‘N’ is decided by the REDDTH[7:0]
bits.
Less than 77 ’One’s are detected on the
Bit 2 of each channel during a 40 ms fixed
window and this status persists for Nx40
ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
More than 7 ‘0xFF00’ (MSB first) are
detected on the DL bits during a 40 ms
fixed window and this status persists for
Nx40 ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
Less than 4 ’One’s are detected on the Y
bit (Bit 6 in each CH 24) during a 40 ms
fixed window and this status persists for
Nx40 ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
Less than 4 zeros are detected on the F-
bit of the 12nd frame during a 40 ms fixed
window and this status persists for Nx40
ms. Here ‘N’ is decided by the
YELDTH[7:0] bits.
Less than 3 zeros are detected on the DL
bits during a 40 ms fixed window and this
status persists for Nx40 ms. Here ‘N’ is
decided by the YELDTH[7:0] bits.
Less than 61 zeros are detected in a 40
ms fixed window and this status persists
for Nx40 ms. Here ‘N’ is decided by the
AISDTH[7:0] bits.
Declare Condition
The in SF/ESF/T1 DM/SLC-96 syn-
chronization status persists Mx120 ms.
Here
REDCTH[7:0] bits.
More than 76 ’One’s are detected on
the Bit 2 of each channel during a 40
ms fixed window and this status per-
sists for Mx40 ms. Here ‘M’ is decided
by the YELCTH[7:0] bits.
Less than 8 ‘0xFF00’ (MSB first) are
detected on the DL bits during a 40 ms
fixed window and this status persists
for Mx40 ms. Here ‘M’ is decided by
the YELCTH[7:0] bits.
More than 3 ’One’s are detected on the
Y bit (Bit 6 in each CH 24) during a 40
ms fixed window and this status per-
sists for Mx40 ms. Here ‘M’ is decided
by the YELCTH[7:0] bits.
More than 3 zeros are detected on the
F-bit of the 12nd frame during a 40 ms
fixed window and this status persists
for Mx40 ms. Here ‘M’ is decided by
the YELCTH[7:0] bits.
More than 2 zeros are detected on the
DL bits during a 40 ms fixed window
and this status persists for Mx40 ms.
Here
YELCTH[7:0] bits.
More than 60 zeros are detected in a
40 ms fixed window and this status
persists for Mx40 ms. Here ‘M’ is
decided by the AISCTH[7:0] bits.
‘M’
‘M’
Clear Condition
is
is
58
decided
decided
cated by the corresponding Status bit. Any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the Status bit will set the corresponding Interrupt Indi-
cation bit to ‘1’ and the Interrupt Indication bit will be cleared by writing a
‘1’. A ‘1’ in the Interrupt Indication bit means there is an interrupt. The
interrupt will be reported by the INT pin if its Interrupt Enable bit is ‘1’.
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
The status of the RED alarm, Yellow alarm and Blue alarm are indi-
by
by
the
the
Status
RED
YEL
YEL
YEL
YEL
YEL
AIS
Bit
Interrupt Indication
REDI
YELI
YELI
YELI
YELI
YELI
AISI
Bit
February 25, 2008
Interrupt Enable
REDE
YELE
YELE
YELE
YELE
YELE
AISE
Bit