82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 226
82P2284BB
Manufacturer Part Number
82P2284BB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82P2284BB.pdf
(363 pages)
Specifications of 82P2284BB
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
82P2284BBG
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NS/TI
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T1/J1 RCRB Configuration (0D2H, 1D2H, 2D2H, 3D2H)
FREEZE:
DEB:
SIGE:
SIGF:
T1/J1 RCRB Access Status (0D3H, 1D3H, 2D3H, 3D3H)
BUSY:
Programming Information
IDT82P2284
Bit Name
Bit Name
= 0: Disable the manual signaling freezing.
= 1: Manually freeze the signaling data in the A,B,C,D bits (b3~0, T1/J1-ID-01~18H) as the previous valid value.
= 0: Disable the signaling de-bounce.
= 1: Enable the signaling de-bounce. That is, the A,B,C,D bits (b3~0, T1/J1-ID-01~18H) are updated only if 2 consecutive received AB/ABCD
codewords of the same channel are identical.
= 0: Disable the interrupt on the INT pin when any of the COSI bits (T1/J1-0D8H,... & T1/J1-0D7H,... & T1/J1-0D6H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when any of the COSI bits (T1/J1-0D8H,... & T1/J1-0D7H,... & T1/J1-0D6H,...) is ‘1’.
This bit is valid only in the ESF and SLC-96 format.
= 0: The extracted signaling bits are in 4 states signaling, i.e., the signaling bits on Framer 6 & 18 of a signaling multi-frame are recognized as ‘A’
and the signaling bits on Framer 12 & 24 are recognized as ‘B’. Only the signaling bits A & B are saved in the Extracted Signaling Data/Extract
Enable register. The C & D bits in the Extracted Signaling Data/Extract Enable register are not cared.
= 1: The extracted signaling bits are in 16 states signaling, i.e., four signaling bits A, B, C & D are all saved in the Extracted Signaling Data/Extract
Enable register.
= 0: No reading or writing operation on the indirect registers.
= 1: An internal indirect register is being accessed. Any new operation on the internal indirect register is not allowed.
Default
Default
Bit No.
Bit No.
Type
Type
7
7
6
6
Reserved
5
5
Reserved
4
4
226
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
FREEZE
R/W
3
0
3
DEB
R/W
2
0
2
SIGE
R/W
1
0
1
February 25, 2008
BUSY
SIGF
R/W
R
0
1
0
0
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