PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 214

16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE

PIC24FJ64GB002-I/SS

Manufacturer Part Number
PIC24FJ64GB002-I/SS
Description
16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
Manufacturer
Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

Processor Series
PIC24
Core
PIC24F
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
8192 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
300 mA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB002-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC24FJ64GB002-I/SS
0
PIC24FJ64GB004 FAMILY
REGISTER 18-4:
DS39940D-page 214
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
DPPULUP
R/W-0
U-0
These bits are only used in Host mode; do not use in Device mode.
Unimplemented: Read as ‘0’
DPPULUP: D+ Pull-Up Enable bit
1 = D+ data line pull-up resistor is enabled
0 = D+ data line pull-up resistor is disabled
DMPULUP: D- Pull-Up Enable bit
1 = D- data line pull-up resistor is enabled
0 = D- data line pull-up resistor is disabled
DPPULDWN: D+ Pull-Down Enable bit
1 = D+ data line pull-down resistor is enabled
0 = D+ data line pull-down resistor is disabled
DMPULDWN: D- Pull-Down Enable bit
1 = D- data line pull-down resistor is enabled
0 = D- data line pull-down resistor is disabled
VBUSON: V
1 = V
0 = V
OTGEN: OTG Features Enable bit
1 = USB OTG is enabled; all D+/D- pull-ups and pull-downs bits are enabled
0 = USB OTG is disabled; D+/D- pull-ups and pull-downs are controlled in hardware by the settings of
VBUSCHG: V
1 = V
0 = V
VBUSDIS: V
1 = V
0 = V
DMPULUP
R/W-0
U-0
the HOSTEN and USBEN bits (U1CON<3,0>)
BUS
BUS
BUS
BUS
BUS
BUS
U1OTGCON: USB ON-THE-GO CONTROL REGISTER
line is powered
line is not powered
line is set to charge to 3.3V
line is set to charge to 5V
line is discharged through a resistor
line is not discharged
BUS
BUS
W = Writable bit
‘1’ = Bit is set
DPPULDWN
BUS
Power-on bit
Discharge Enable bit
R/W-0
Charge Select bit
U-0
(1)
(1)
DMPULDWN
(1)
R/W-0
(1)
U-0
(1)
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VBUSON
R/W-0
U-0
(1)
OTGEN
R/W-0
U-0
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
VBUSCHG
R/W-0
U-0
(1)
VBUSDIS
R/W-0
U-0
bit 8
bit 0
(1)

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