PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 66

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
TABLE 6-3:
DS39940D-page 66
POR
BOR
All Others
Note 1:
Note:
Reset Type
(6)
2:
3:
4:
5:
6:
7:
T
T
T
T
T
T
oscillator clock to the system.
If Two-Speed Start-up is enabled, regardless of the primary oscillator selected, the device starts with FRC,
and in such cases, FRC start-up time is valid.
For detailed operating frequency and timing specifications, see Section 29.0 “Electrical Characteristics”.
OST
RST
POR
PWRT
FRC
LOCK
= Internal State Reset time.
and T
= Oscillator Start-up Timer (OST). A 10-bit counter waits 1024 oscillator periods before releasing the
= Power-on Reset delay.
RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
= PLL lock time.
= 64 ms nominal if regulator is disabled (DISVREG tied to V
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
Any Clock
LPRC
= RC Oscillator start-up times.
Clock Source
Preliminary
T
T
T
T
T
T
T
POR
POR
POR
POR
POR
POR
POR
SYSRST Delay
T
T
T
T
T
T
T
RST
RST
RST
RST
RST
RST
RST
+ T
+ T
+ T
+ T
+ T
+ T
+ T
T
RST
RST
RST
RST
RST
RST
RST
+ T
+ T
+ T
+ T
+ T
+ T
+ T
RST
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
+ T
+ T
+ T
+ T
+ T
+ T
+ T
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
DD
).
System Clock
T
T
T
T
 2010 Microchip Technology Inc.
OST
FRC
FRC
FRC
T
T
T
T
Delay
T
T
T
T
LPRC
LOCK
LPRC
LOCK
+ T
+ T
OST
+ T
OST
+ T
—
FRC
—
FRC
—
LOCK
LOCK
LOCK
LOCK
1, 2, 3
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 5
1, 2, 3, 4, 5
1, 2, 3, 6
1, 2, 3, 5, 6
2, 3
2, 3, 4
2, 3, 4
2, 3, 5
2, 3, 4, 5
2, 3, 6
2, 3, 4, 5
2
Notes