MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 361

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

7.4.3
This section describes interrupts originated by the ECT block. The MCU must service the interrupt
requests.
The ECT only originates interrupt requests. The following is a description of how the module makes a
request and how the MCU should acknowledge that request. The interrupt vector offset and interrupt
number are chip dependent.
7.4.3.1
This active high output will be asserted by the module to request a timer channel 7–0 interrupt to be
serviced by the system controller.
7.4.3.2
This active high output will be asserted by the module to request a modulus counter underflow interrupt
to be serviced by the system controller.
7.4.3.3
This active high output will be asserted by the module to request a timer pulse accumulator B overflow
interrupt to be serviced by the system controller.
7.4.3.4
This active high output will be asserted by the module to request a timer pulse accumulator A input
interrupt to be serviced by the system controller.
7.4.3.5
This active high output will be asserted by the module to request a timer pulse accumulator A overflow
interrupt to be serviced by the system controller.
7.4.3.6
This active high output will be asserted by the module to request a timer overflow interrupt to be serviced
by the system controller.
Freescale Semiconductor
Table 7-37
Timer channel 7–0
Modulus counter underflow
Pulse accumulator B overflow
Pulse accumulator A input
Pulse accumulator A overflow
Timer overflow
Interrupts
Channel [7:0] Interrupt
Modulus Counter Interrupt
Pulse Accumulator B Overflow Interrupt
Pulse Accumulator A Input Interrupt
Pulse Accumulator A Overflow Interrupt
Timer Overflow Interrupt
Interrupt Source
lists the interrupts generated by the ECT to communicate with the MCU.
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 7-37. ECT Interrupts
Active high timer channel interrupts 7–0
Active high modulus counter interrupt
Active high pulse accumulator B interrupt
Active high pulse accumulator A input interrupt
Pulse accumulator overflow interrupt
Timer 0verflow interrupt
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
Description
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