MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 876

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.69 Port AD1 Data Direction Register 1 (DDR1AD1)
Read: Anytime.
Write: Anytime.
This register configures pins PAD[15:08] as either input or output.
878
DDR1AD1[15:8]
Reset
Field
W
R
7–0
DDR1AD115 DDR1AD114 DDR1AD113 DDR1AD112 DDR1AD111 DDR1AD110 DDR1AD19
0
7
Data Direction Port AD1 Register 1
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is
Note: To use the digital input function on port AD1 the ATD1 digital input enable register (ATD1DIEN1) has
read on PTAD11 register, when changing the DDR1AD1 register.
to be set to logic level “1”.
Figure 22-71. Port AD1 Data Direction Register 1 (DDR1AD1)
0
6
Table 22-62. DDR1AD1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
5
0
4
Description
0
3
0
2
Freescale Semiconductor
0
1
DDR1AD18
0
0

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