MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 967

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

A valid edge on an input is detected if 4 consecutive samples of a passive level are followed by
4 consecutive samples of an active level directly or indirectly.
The filters are continuously clocked by the bus clock in run and wait mode. In stop mode, the clock
is generated by an RC-oscillator in the port integration module. To maximize current saving the
RC oscillator runs only if the following condition is true on any pin individually:
Sample count <= 4 and interrupt enabled (PIE = 1) and interrupt flag not set (PIF = 0).
23.0.9
All peripheral ports T, S, M, P, H, J, AD0, and AD1 start up as general purpose inputs after reset.
Depending on the external mode pin condition, the external bus interface related ports A, B, C, D,
E, and K start up as general purpose inputs on reset or are configured for their alternate functions.
Glitch, filtered out, no interrupt flag set
Valid pulse, interrupt flag set
Expanded Bus Pin Functions
Figure 23-77. Interrupt Glitch Filter on Port P, H, and J (PPS = 0)
Uncertain
1. These values include the spread of the oscillator frequency over
Ignored
Pulse
Valid
temperature, voltage and process.
Table 23-69. Pulse Detection Criteria
t
pign
Figure 23-78. Pulse Illustration
3 < t
t
pval
t
t
pulse
pulse
STOP
pulse
< 4
3
4
uncertain
t
pulse
Bus clocks
Bus clocks
Bus clocks
Unit
Mode
t
pign
t
t
pulse
pulse
< t
STOP
pulse
t
t
pign
1
pval
< t
pval