MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 654

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 18 Memory Mapping Control (S12XMMCV3)
18.1.4.2
18.1.5
Figure 18-1
18.2
The user is advised to refer to the SoC Guide for port configuration and location of external bus signals.
Some pins may not be bonded out in all implementations.
Table 18-2
operation.
1. Doted blocks and lines are optional. Please refer to the Device User Guide for their availlibilities.
654
•
•
•
EEPROM
FLASH
Single chip modes
In normal and special single chip mode the internal memory is used. External bus is not active.
Expanded modes
Address, data, and control signals are activated in normal expanded and special test modes when
accessing the external bus. Access to internal resources will not cause activity on the external bus.
Emulation modes
External bus is active to emulate, via an external tool, the normal expanded or the normal single
chip mode.
External Signal Description
and
1
Block Diagram
Functional Modes
shows a block diagram of the MMC.
Table 18-3
outline the pin names and functions. It also provides a brief description of their
MMC
BDM
EBI
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 18-1. MMC Block Diagram
Address Decoder & Priority
Target Bus Controller
CPU
RAM
XGATE
Peripherals
FLEXRAY
Freescale Semiconductor
DBG