ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 128
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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5.5.2.20 SMM Control MSR (SMM_CTL_MSR)
MSR Address
Type
Reset Value
128
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:6
Bit
5
4
3
2
1
0
Name
RSVD (RO)
SMI_EXTL
SMI_IO
SMI_INST
SMM_NEST
SMM_SUSP
SMM_NMI
00001301h
R/W
00000000_00000000h
33234H
Description
Reserved (Read Only).
Enable External ASMI Pin. Enable external asynchronous SMIs.
0: Disable.
1: Enable.
Enable I/O Generated SMI. Enable SMIs caused by an I/O instruction.
0: Disable.
1: Enable.
Enable SMI Instructions. Enable SMI instructions: SMINT, RSM, SVDC, RSDC,
SVLDT, RSLDT, SVTS, RSTS. If not enabled, executing an SMI instruction causes an
invalid operation fault.
0: Disable.
1: Enable.
Enable SMI Nesting. Enable non-software SMIs during SMM mode.
0: Disable.
1: Enable.
Enable Suspend during SMM. Enable Suspend during SMM mode.
0: Disable.
1: Enable.
Enable Non-Maskable Interrupts during SMM. Enable NMI during SMM mode.
0: Disable.
1: Enable.
SMM_CTL_MSR Bit Descriptions
SMM_CTL_MSR Register Map
RSVD
RSVD
AMD Geode™ LX Processors Data Book
9
8
CPU Core Register Descriptions
7
6
5
4
3
2
1
0
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