ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 528

• Manufacturer Part Number: ALXD800EEXJCVD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJCVD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.12.3.15 SB CBC Initialization Vector 1 (SB_CBC_IV_1)
SB Memory Offset 044h
Type
Reset Value
6.12.3.16 SB CBC Initialization Vector 2 (SB_CBC_IV_2)
SB Memory Offset 048h
Type
Reset Value
6.12.3.17 SB CBC Initialization Vector 3 (SB_CBC_IV_3)
SB Memory Offset 04Ch
Type
Reset Value
528
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:0
31:0
31:0
Bit
Bit
Bit
Name
CBC_IV_3
[127:96]
Name
IV[63:32]
Name
CBC_IV_2 [95:64]
R/W
00000000h
R/W
00000000h
R/W
00000000h
33234H
Description
CBC Initialization Vector 3 [127:96]. Bits [127:96] of the IV for the CBC AES Mode.
Change this register only when both A and B channels are IDLE. (A and B start bits, SB
Memory Offset 000h and 004h, bit 0 = 0). This register must be programmed with the IV
prior to starting an AES CBC mode encryption or decryption.
Description
CBC Initialization Vector 1 [63:32]. Bits [63:32] of the IV for the CBC AES mode.
Change this register only when both A and B channels are IDLE. (A and B start bits, SB
Memory Offset 000h and 004h, bit 0 = 0). This register must be programmed with the IV
prior to starting an AES CBC mode encryption or decryption.
Description
CBC Initialization Vector 2 [95:64]. Bits [95:64] of the IV for the CBC AES mode.
Change this register only when both A and B channels are IDLE. (A and B start
bits, SB Memory Offset 000h and 004h, bit 0 = 0). This register must be pro-
grammed with the IV prior to starting an AES CBC mode encryption or decryption.
SB_CBC_IV_3 Bit Descriptions
SB_CBC_IV_2 Bit Descriptions
SB_CBC_IV_1 Bit Descriptions
SB_CBC_IV_3 Register Map
SB_CBC_IV_1 Register Map
SB_CBC_IV_2 Register Map
CBC_IV_3[127:96] (rev2.0)
CBC_IV_1[63:32]
CBC_IV_2[95:64]
AMD Geode™ LX Processors Data Book
9
9
9
Security Block Register Descriptions
8
8
8
7
7
7
6
6
6
5
5
5
4
4
4
3
3
3
2
2
2
1
1
1
0
0
0