ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 622
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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8.1.2.4
The eee field (bits [5:3]) is used to select the control, debug, and test registers in the MOV instructions. The type of register
and base registers selected by the eee field are listed in Table 8-7. The values shown in Table 8-7 are the only valid encod-
ings for the eee bits.
8.1.3
The mod and r/m fields within the mod r/m byte select the type of memory addressing to be used. Some instructions use a
fixed addressing mode (e.g., PUSH or POP) and therefore, these fields are not present. Table 8-8 lists the addressing method
when 16-bit addressing is used and a mod r/m byte is present. Some mod r/m field encodings are dependent on the w field
and are shown in Table 8-9.
622
mod Field
00
00
00
00
00
00
00
00
eee Field (MOV-Instruction Register Selection)
mod and r/m Byte (Memory Addressing)
eee Field
000
010
011
100
000
001
010
011
110
111
000
001
010
011
100
101
110
111
r/m Field
33234H
000
001
010
011
100
101
110
111
DS:[BX+SI]
DS:[BX+DI]
SS:[BP+SI]
SS:[BP+DI]
DS:[SI]
DS:[DI]
DS:[d16]
DS:[BX]
Table 8-8. mod r/m Field Encoding
16-Bit Address Mode with
Table 8-7. eee Field Encoding
mod r/m Byte (Note 1)
Control Register
Control Register
Control Register
Control Register
Debug Register
Debug Register
Debug Register
Debug Register
Debug Register
Debug Register
Register Type
Test Register
Test Register
Test Register
Test Register
Test Register
Test Register
Test Register
Test Register
DS:[EAX]
DS:[ECX]
DS:[EDX]
DS:[EBX]
s-i-b is present (See Table 8-15 on page 626)
DS:[d32]
DS:[ESI]
DS:[EDI]
32-Bit Address Mode with mod r/m Byte and
AMD Geode™ LX Processors Data Book
No s-i-b Byte Present
Base Register
(Note 1)
CR0
CR2
CR3
CR4
DR0
DR1
DR2
DR3
DR6
DR7
TR0
TR1
TR2
TR3
TR4
TR5
TR6
TR7
Instruction Set
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