ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 50
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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4.2
All GeodeLink™ Interface Unit (GLIU) registers are Model
Specific Registers (MSRs) and are accessed through the
RDMSR and WRMSR instructions.
The registers associated with the GLIU are the Standard
GeodeLink Device (GLD) MSRs, GLIU Specific MSRs.
GLIU Statistic and Comparator MSRs, P2D Descriptor
MSRs, and I/O Descriptor MSRs. The tables that follow are
50
GLIU0: 10002000h
GLIU1: 40002000h
GLIU0: 10002001h
GLIU1: 40002001h
GLIU0: 10002002h
GLIU1: 40002002h
GLIU0: 10002003h
GLIU1: 40002003h
GLIU0: 10002004h
GLIU1: 40002004h
GLIU0: 10002005h
GLIU1: 40002005h
GLIU0: 10000080h
GLIU1: 40000080h
GLIU0: 10000081h
GLIU1: 40000081h
GLIU0: 10000082h
GLIU1: 40000082h
GLIU0: 10000083h
GLIU1: 40000083h
GLIU0: 10000084h
GLIU1: 40000084h
GLIU0: 10000086h
GLIU1: 40000086h
GLIU0: 10000087h
GLIU1: 40000087h
GLIU0: 10000088h
GLIU1: 40000088h
MSR Address
MSR Address
GLIU Register Descriptions
33234H
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Table 4-5. GeodeLink™ Device Standard MSRs Summary
Register Name
GLD Capabilities MSR (GLD_MSR_CAP)
GLD Master Configuration MSR
(GLD_MSR_CONFIG)
GLD SMI MSR (GLD_MSR_SMI)
GLD Error MSR (GLD_MSR_ERROR)
GLD Power Management MSR
(GLD_MSR_PM)
GLD Diagnostic MSR (GLD_MSR_DIAG)
Register Name
Coherency (COH)
Port Active Enable (PAE)
Arbitration (ARB)
Asynchronous SMI (ASMI)
Asynchronous ERR (AERR)
GLIU Physical Capabilities (PHY_CAP)
N Outstanding Response (NOUT_RESP)
N Outstanding Write Data (NOUT_WDATA)
Table 4-6. GLIU Specific MSRs Summary
register summary tables that include reset values and page
references where the bit descriptions are provided.
Note: The MSR address is derived from the perspective
Reserved (RSVD) fields do not have any meaningful stor-
age elements. They always return 0.
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
00000000_00000001h
00000000_00000000h
00000000_00000000h
00000000_000014xxh
00000000_00000002h
00000000_00000004h
00000000_00000000h
Configuration Dependent
20291830_010C1086h
10000000_00000000h
00000000_00000000h
20311030_0100400Ah
Boot Strap Dependent
00000000_00000000h
00000000_00000000h
00000000_00000000h
AMD Geode™ LX Processors Data Book
Reset Value
Reset Value
GLIU0:
GLIU1:
GLIU0:
GLIU1:
GLIU Register Descriptions
Reference
Reference
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