ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 577
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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GeodeLink™ PCI Bridge Register Descriptions
6.16.1.5 GLD Power Management MSR (GLD_MSR_PM)
MSR Address
Type
Reset Value
6.16.1.6 GLD Diagnostic MSR (GLD_MSR_DIAG)
MSR Address
Type
Reset Value
This register is for AMD use only and should not be written to.
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:5
Bit
4
3
2
1
0
Name
RSVD (RO)
PM2
RSVD (RO)
PM1
RSVD (RO)
PM0
50002004h
R/W
00000000_00000015h
50002005h
R/W
00000000_00000000h
Description
Reserved (Read Only). Reserved for future use.
Power Mode 2. Power mode for PCI-fast clock domain.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
Reserved (Read Only). Reserved for future use.
Power Mode 1. Power mode for PCI clock domain.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
Reserved (Read Only). Reserved for future use.
Power Mode 0. Power mode for GLIU clock domain.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
GLD_MSR_PM Bit Descriptions
GLD_MSR_PM Register Map
RSVD
RSVD
9
8
33234H
7
6
5
4
3
2
1
577
0
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