ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 300
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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6.6
This section provides information on the registers associ-
ated with the Display Controller (DC) (i.e., GUI and VGA
blocks), including the Standard GeodeLink™ Device (GLD)
MSRs and the Display Controller Specific MSRs (accessed
via the RDMSR and WRMSR instructions). Table 6-45
through Table 6-50 are register summary tables that
300
Configuration and Status Registers
Memory Organization Registers
80002000h
80002001h
80002002h
80002003h
80002004h
80002005h
80000012h
Address
Address
Memory
Offset
MSR
MSR
00Ch
000h
004h
008h
010h
014h
018h
DC
Display Controller Register Descriptions
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
33234H
Table 6-45. Standard GeodeLink™ Device MSRs Summary
Table 6-47. DC Configuration Control Register Summary
Register Name
GLD Capabilities MSR (GLD_MSR_CAP)
GLD Master Configuration MSR
(GLD_MSR_CONFIG)
GLIU0 Device SMI MSR (GLD_MSR_SMI)
GLD Error MSR (GLD_MSR_ERROR)
GLD Power Management MSR
(GLD_MSR_PM)
GLIU0 Device Diagnostic MSR
(GLD_MSR_DIAG)
Register Name
DC RAM Control MSR
(DC_RAM_CTL_MSR)
Register Name
DC Unlock (DC_UNLOCK)
DC General Configuration (DC_GENERAL_CFG)
DC Display Configuration (DC_DISPLAY_CFG)
DC Arbitration Configuration (DC_ARB_CFG)
DC Frame Buffer Start Address
(DC_FB_ST_OFFSET)
DC Compression Buffer Start Address
(DC_CB_ST_OFFSET)
DC Cursor Buffer Start Address
(DC_CURS_ST_OFFSET)
Table 6-46. DC Specific MSRs Summary
include reset values and page references where the bit
descriptions are provided.
Note: The MSR address is derived from the perspective
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
00000000_0003E4xxh
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000015h
00000000_00000000h
00000000_02020202h
Display Controller Register Descriptions
Reset Value
Reset Value
AMD Geode™ LX Processors Data Book
Reset Value
00000000h
00000000h
00000000h
00000000h
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
Reference
Reference
Reference
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