ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 74

• Manufacturer Part Number: ALXD800EEXJCVD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJCVD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

4.2.3.4
The RQ Compare Value and the RQ Compare Mask enable traps on specific transactions. A hit to the RQ Compare is
determined by hit = (RQ_IN & RQ_COMPARE_MASK) == RQ_COMPARE_VAL). A hit can trigger the RQ_CMP error
sources when they are enabled. The value is compared only after the packet is arbitrated.
Request Compare Value (RQ_COMPARE_VAL[0])
MSR Address
Type
Reset Value
Request Compare Value (RQ_COMPARE_VAL[1])
MSR Address
Type
Reset Value
74
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:53
52:0
Bit
Bit
2
1
0
Request Compare Value (RQ_COMPARE_VAL[0:3]
Name
HIT_ASMI
HIT_DEC
HIT_LDEN
Name
RSVD
RQ_VAL
RSVD
GLIU0: 100000C0h
GLIU1: 400000C0h
R/W
001FFFFF_FFFFFFFFh
GLIU0: 100000C2h
GLIU1: 400000C2h
R/W
001FFFFF_FFFFFFFFh
33234H
Description
Assert ASMI on Descriptor Hit. The descriptor hits are ANDed with the masks and then
all ORed together.
0: Disable.
1: Enable.
Decrement Counter on Descriptor Hit. The descriptor hits are ANDed with the masks
and then all ORed together.
0: Disable.
1: Enable.
Load Counter on Descriptor Hit. The descriptor hits are ANDed with the masks and
then all ORed together.
0: Disable.
1: Enable.
Description
Reserved.
Request Packet Value. This is the value compared against the logical bit-wise AND of
the incoming request packet and the RQ_COMPMASK in order to determine a ‘hit”.
RQ_COMPARE_VAL[0:3] Bit Descriptions
STATISTIC_ACTION[0:3] Bit Descriptions
RQ_COMPARE_VAL[0:3] Register
RQ_VAL
Request Compare Value (RQ_COMPARE_VAL[2])
MSR Address
Type
Reset Value
Request Compare Value (RQ_COMPARE_VAL[3])
MSR Address
Type
Reset Value
RQ_VAL
GLIU0: 100000C4h
GLIU1: 400000C4h
R/W
001FFFFF_FFFFFFFFh
GLIU0: 100000C6h
GLIU1: 400000C6h
R/W
001FFFFF_FFFFFFFFh
AMD Geode™ LX Processors Data Book
9
8
7
GLIU Register Descriptions
6
5
4
3
2
1
0