ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 195
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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CPU Core Register Descriptions
5.5.2.106 Bus Controller Extended Debug Registers 6 and 7 MSR (BXDR6_BXDR7_MSR)
MSR Address
Type
Reset Value
BXDR6 (bits [31:0]) contains the status of the extended bus controller breakpoints. When a breakpoint occurs, the corre-
sponding status bit is set in this register. The status bits remain set until cleared by an MSR write.
BXDR7 (bits [63:32]) is used to enable and specify the type of BXDR0-BXDR3. BXDR7 is also used to specify the length of
the breakpoint. For example, if BXDR0 is set to 00000006h, and BXDR7 indicates it has a length of 2 bytes, then an access
to 00000006h or 00000007h triggers the breakpoint. BXDR0 and BXDR1 can be paired to specify a range breakpoint if the
LEN0 or LEN1 field of BXDR7 is set accordingly. BXDR2 and BXDR3 can be paired to specify a range breakpoint if the
LEN2 or LEN3 field of BXDR7 is set accordingly.
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
BXDR7
63:60
59:56
55:52
51:48
47:46
45:44
43:42
Bit
TYPE3
Name
TYPE3
TYPE2
TYPE1
TYPE0
LEN3
LEN2
LEN1
TYPE2
00001953h
R/W
00000000_00000000h
Description
Extended Breakpoint 3 Type. Selects the type of extended breakpoint 3.
0000: IM memory read (Default)
0001: DM memory read
0010: DM memory write
0011: DM memory read/write
0100: DM I/O read
0101: DM I/O write
0110: DM I/O read/write
0111: GLBus snoop for read
1000: GLBus snoop for write
1001: GLBus snoop for write-invalidate
1010: MSR read
1011: MSR write
All Others: Undefined, breakpoint will not trigger
Extended Breakpoint 2 Type. Selects the type of extended breakpoint 2. See TYPE3
(bits [63:60]) for decode.
Extended Breakpoint 1 Type. Selects the type of extended breakpoint 1. See TYPE3
(bits [63:60]) for decode.
Extended Breakpoint 0 Type. Selects the type of extended breakpoint 0. See TYPE3
(bits [63:60]) for decode.
Extended Breakpoint 3 Length. Selects the size of extended breakpoint 3.
00: 1 byte. (Default)
01: 2 bytes.
10: Range from even to odd register.
11: 4 bytes.
Extended Breakpoint 2 Length. Selects the size of extended breakpoint 2. See LEN3
(bits [47:46]) for decode.
Extended Breakpoint 1 Length. Selects the size of extended breakpoint 0. See LEN3
(bits [47:46]) for decode.
TYPE1
BXDR6_BXDR7_MSR Bit Descriptions
BXDR6_BXDR7_MSR Register Map
TYPE0
RSVD
LEN3
LEN2
LEN1
LEN0
9
8
33234H
7
RSVD
6
5
4
E3 E2 E1 E0
T3 T2 T1 T0
3
2
1
195
0
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