PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 101

• Manufacturer Part Number: PIC10F322T-I/OT
• Description: 896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
• Manufacturer: Microchip Technology

Specifications of PIC10F322T-I/OT

• Core: RISC
• Processor Series: PIC10F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 31 KHz
• Program Memory Size: 512 B
• Data Ram Size: 64 B
• Number Of Programmable I/os: 4
• Number Of Timers: 2
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: SOT-23-6
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

16.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
Figure 16-1
16.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
16.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the T0CS bit of the OPTION_REG
register.
FIGURE 16-1:
 2011 Microchip Technology Inc.
T0CKI
F
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
is a block diagram of the Timer0 module.
T0SE
BLOCK DIAGRAM OF THE TIMER0 PRESCALER
T0CS
0
1
Preliminary
Prescaler
8-bit
8
PS<2:0>
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
16.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin.
8-Bit Counter mode using the T0CKI pin is selected by
setting the T0CS bit in the OPTION_REG register to ‘1’.
The rising or falling transition of the incrementing edge
for the external input source is determined by the T0SE
bit in the OPTION_REG register.
Note:
PIC10(L)F320/322
The value written to the TMR0 register
can be adjusted, in order to account for
the two instruction cycle delay when
TMR0 is written.
8-BIT COUNTER MODE
PSA
1
0
2 T
S
YNC
CY
Set Flag bit TMR0IF
DS41585A-page 101
Data Bus
8
on Overflow
TMR0