PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 161
![896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V](/photos/16/3/160337/6-sot23-large-300dpi-lyrd_sml.jpg)
PIC10F322T-I/OT
Manufacturer Part Number
PIC10F322T-I/OT
Description
896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
Manufacturer
Microchip Technology
Datasheet
1.PIC10F320-IOT.pdf
(210 pages)
Specifications of PIC10F322T-I/OT
Core
RISC
Processor Series
PIC10F
Data Bus Width
8 bit
Maximum Clock Frequency
31 KHz
Program Memory Size
512 B
Data Ram Size
64 B
Number Of Programmable I/os
4
Number Of Timers
2
Operating Temperature Range
- 40 C to + 85 C
Package / Case
SOT-23-6
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Program Memory Type
Flash
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC10F322T-I/OT
Manufacturer:
VISHAY
Quantity:
11 490
Part Number:
PIC10F322T-I/OT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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23.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 f 127
d 0,1
(W) + (f) (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND W with f
[ label ] ANDWF
0 f 127
d 0,1
(W) .AND. (f) (destination)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
[ label ] ADDLW
0 k 255
(W) + k (W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the
W register.
[ label ] ANDLW
0 k 255
(W) .AND. (k) (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
Add literal and W
AND literal with W
f,d
f,d
k
k
Preliminary
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC10(L)F320/322
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 f 127
0 b 7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded, and a NOP
is executed instead, making this a
two-cycle instruction.
Bit Clear f
[ label ] BCF
0 f 127
0 b 7
0 (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0 f 127
0 b 7
1 (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
f,b
f,b
DS41585A-page 161
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