PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 116

• Manufacturer Part Number: PIC10F322T-I/OT
• Description: 896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
• Manufacturer: Microchip Technology

Specifications of PIC10F322T-I/OT

• Core: RISC
• Processor Series: PIC10F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 31 KHz
• Program Memory Size: 512 B
• Data Ram Size: 64 B
• Number Of Programmable I/os: 4
• Number Of Timers: 2
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: SOT-23-6
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

PIC10(L)F320/322
19.2
An interrupt will be generated upon a change in the
output value of the CLCx when the appropriate interrupt
enables are set. A rising edge detector and a falling
edge detector are present in each CLC for this purpose.
TheCLCxIF bit of the associated PIR registers will be
set when either edge detector is triggered and its asso-
ciated enable bit is set. The LCxINTP enables rising
edge interrupts and the LCxINTN bit enables falling
edge interrupts. Both are located in the CLCxCON reg-
ister.
To fully enable the interrupt, set the following bits:
• LCxON bit of the CLCxCON register
• CLCxIE bit of the associated PIE registers
• LCxINTP bit of the CLCxCON register (for a rising
• LCxINTN bit of the CLCxCON register (for a falling
• PEIE and GIE bits of the INTCON register
The CLCxIF bit of the associated PIR registers must be
cleared in software as part of the interrupt service. If
another edge is detected while this flag is being
cleared, the flag will still be set at the end of the
sequence.
19.3
The CLCxCON register is cleared to zero as the result
of a Reset. All other selection and gating values remain
unchanged.
19.4
The selection, gating, and logic functions are not
affected by Sleep. Operation will continue provided that
the source signals are also not affected by Sleep.
DS41585A-page 116
edge detection)
edge detection)
CLCx Interrupts
Effects of a Reset
Operation During Sleep
Preliminary
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