PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 103

• Manufacturer Part Number: PIC10F322T-I/OT
• Description: 896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
• Manufacturer: Microchip Technology

Specifications of PIC10F322T-I/OT

• Core: RISC
• Processor Series: PIC10F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 31 KHz
• Program Memory Size: 512 B
• Data Ram Size: 64 B
• Number Of Programmable I/os: 4
• Number Of Timers: 2
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: SOT-23-6
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

REGISTER 16-1:
TABLE 16-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
INTCON
OPTION_REG WPUEN INTEDG
TMR0
TRISA
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
WPUEN
R/W-1/u
Name
WPUEN does not disable the pull-up for the MCLR input when MCLR = 1.
Timer0 module.
WPUEN: Weak Pull-up Enable bit
1 = Weak pull-ups are disabled
0 = Weak pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is inactive and has no effect on the Timer 0 module
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
INTEDG
R/W-1/u
Bit 7
GIE
—
OPTION_REG: OPTION REGISTER
Bit Value
000
001
010
011
100
101
110
111
PEIE
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
R/W-1/u
T0CS
TMR0 Rate
TMR0IE
T0CS
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
Bit 5
—
Timer0 module Register
R/W-1/u
T0SE
(1)
Preliminary
T0SE
INTE
Bit 4
—
OSC
/4)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
IOCIE
R/W-1/u
Bit 3
PSA
—
PSA
TMR0IF
TRISA2
PIC10(L)F320/322
Bit 2
R/W-1/u
PS<2:0>
TRISA1
Bit 1
INTF
PS<2:0>
R/W-1/u
TRISA0
IOCIF
Bit 0
DS41585A-page 103
Register on
R/W-1/u
Page
103
46
46
77
bit 0