PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 120
![896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V](/photos/16/3/160337/6-sot23-large-300dpi-lyrd_sml.jpg)
PIC10F322T-I/OT
Manufacturer Part Number
PIC10F322T-I/OT
Description
896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
Manufacturer
Microchip Technology
Datasheet
1.PIC10F320-IOT.pdf
(210 pages)
Specifications of PIC10F322T-I/OT
Core
RISC
Processor Series
PIC10F
Data Bus Width
8 bit
Maximum Clock Frequency
31 KHz
Program Memory Size
512 B
Data Ram Size
64 B
Number Of Programmable I/os
4
Number Of Timers
2
Operating Temperature Range
- 40 C to + 85 C
Package / Case
SOT-23-6
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Program Memory Type
Flash
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC10F322T-I/OT
Manufacturer:
VISHAY
Quantity:
11 490
Part Number:
PIC10F322T-I/OT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC10(L)F320/322
REGISTER 19-2:
DS41585A-page 120
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
LCxPOL
R/W-x/u
LCxPOL: LCOUT Polarity Control bit
1 = The output of the logic cell is inverted
0 = The output of the logic cell is not inverted
Unimplemented: Read as ‘0’
LCxG4POL: Gate 4 Output Polarity Control bit
1 = The output of gate 4 is inverted when applied to the logic cell
0 = The output of gate 4 is not inverted
LCxG3POL: Gate 3 Output Polarity Control bit
1 = The output of gate 3 is inverted when applied to the logic cell
0 = The output of gate 3 is not inverted
LCxG2POL: Gate 2 Output Polarity Control bit
1 = The output of gate 2 is inverted when applied to the logic cell
0 = The output of gate 2 is not inverted
LCxG1POL: Gate 1 Output Polarity Control bit
1 = The output of gate 1 is inverted when applied to the logic cell
0 = The output of gate 1 is not inverted
U-0
—
CLCxPOL: SIGNAL POLARITY CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
—
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
LCxG4POL
R/W-x/u
LCxG3POL
R/W-x/u
2011 Microchip Technology Inc.
LCxG2POL
R/W-x/u
LCxG1POL
R/W-x/u
bit 0
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