PIC10F322T-I/OT Microchip Technology, PIC10F322T-I/OT Datasheet - Page 34

• Manufacturer Part Number: PIC10F322T-I/OT
• Description: 896 B Flash, 64 B RAM, 4 I/O, 8bit ADC, PWM, CLC, DDS, CWG, TEMP Indicator, 2.3V
• Manufacturer: Microchip Technology

Specifications of PIC10F322T-I/OT

• Core: RISC
• Processor Series: PIC10F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 31 KHz
• Program Memory Size: 512 B
• Data Ram Size: 64 B
• Number Of Programmable I/os: 4
• Number Of Timers: 2
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: SOT-23-6
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

PIC10(L)F320/322
5.1
The POR circuit holds the device in Reset until V
reached an acceptable level for minimum operation.
Slow rising V
performance may require greater than minimum V
The PWRT, BOR or MCLR features can be used to
extend the start-up period until all device operation
conditions have been met.
5.1.1
The Power-up Timer provides a nominal 64 ms time-
out on POR or Brown-out Reset.
The device is held in Reset as long as PWRT is active.
The PWRT delay allows additional time for the V
rise to an acceptable level. The Power-up Timer is
enabled by clearing the PWRTE bit in Configuration
Word.
The Power-up Timer starts after the release of the POR
and BOR.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
TABLE 5-1:
5.2.1
When the BOREN bits of Configuration Word are
programmed to ‘11’, the BOR is always on. The device
start-up will be delayed until the BOR is ready and V
is higher than the BOR threshold.
BOR protection is active during Sleep. The BOR does
not delay wake-up from Sleep.
5.2.2
When the BOREN bits of Configuration Word are
programmed to ‘10’, the BOR is on, except in Sleep.
The device start-up will be delayed until the BOR is
ready and V
BOR protection is not active during Sleep. The device
wake-up will be delayed until the BOR is ready.
DS41585A-page 34
BOREN<1:0>
Note 1: Even though this case specifically waits for the BOR, the BOR is already operating, so there is no delay in
11
10
01
00
Power-on Reset (POR)
POWER-UP TIMER (PWRT)
start-up.
BOR IS ALWAYS ON
BOR IS OFF IN SLEEP
DD
DD
is higher than the BOR threshold.
, fast operating speeds or analog
BOR OPERATING MODES
SBOREN
X
X
1
0
X
Device Mode
Awake
Sleep
X
X
X
X
DD
DD
Preliminary
has
DD
DD
to
.
BOR Mode
Disabled
Disabled
Disabled
Active
Active
Active
5.2
The BOR circuit holds the device in Reset when V
reaches a selectable minimum level. Between the
POR and BOR, complete voltage range coverage for
execution protection can be implemented.
The Brown-out Reset module has four operating
modes controlled by the BOREN<1:0> bits in Configu-
ration Word. The four operating modes are:
• BOR is always on
• BOR is off when in Sleep
• BOR is controlled by software
• BOR is always off
Refer to
The Brown-out Reset voltage level is selectable by
configuring the BORV bit in
A V
gering on small events. If V
duration greater than parameter T
will reset. See
5.2.3
When the BOREN bits of Configuration Word are
programmed to ‘01’, the BOR is controlled by the
SBOREN bit of the BORCON register. The device start-
up is not delayed by the BOR ready condition or the
V
BOR protection begins as soon as the BOR circuit is
ready. The status of the BOR circuit is reflected in the
BORRDY bit of the BORCON register.
BOR protection is unchanged by Sleep.
DD
DD
level.
noise rejection filter prevents the BOR from trig-
Table 5-1
Brown-Out Reset (BOR)
BOR CONTROLLED BY SOFTWARE
Release of POR/Wake- up from Sleep
Figure 5-2
for more information.
Device Operation upon:
Waits for BOR ready
Waits for BOR ready
Begins immediately
 2011 Microchip Technology Inc.
for more information.
Register
DD
falls below V
BORDC
3-1.
(1)
, the device
BOR
for a
DD