ADWPCIXRSKU20 Intel, ADWPCIXRSKU20 Datasheet - Page 114

• Manufacturer Part Number: ADWPCIXRSKU20
• Manufacturer: Intel

Specifications of ADWPCIXRSKU20

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Platform Management
The LM93 controls the actual fan speeds based on temperature measurements according to a
built-in table. The table itself is loaded as part of the SDR package according to which system
configuration is used. In addition, BIOS passes in certain temperature data to the LM93 during
POST.
5.2.11
The mBMC implements a single private SMBus called the peripheral SMBus. The mBMC
supports master-only mode for this SMBus. External agents must use the mBMC’s Master
Write/Read I
5.2.12
The mBMC implements a fully IPMI 1.5 compatible watchdog timer. See the IPMI 1.5
specification for details on watchdog timer configuration.
5.2.13
The mBMC implements the logical System Event Log device as specified in the Intelligent
Platform Management Interface Specification, Version 1.5. The SEL is accessible via all
channels. In this way, the SEL information can be accessed through out-of-band interfaces
while the system is down. The mBMC supports a maximum SEL size of 92 entries.
5.2.13.1
It can take up to one minute to clear a System Event Log based upon other concurrent mBMC
operations.
5.2.13.2
The mBMC maintains a four-byte internal timestamp clock used by the SEL and SDR
subsystems. This clock is incremented once per second and is read and set using the Get SEL
Time and Set SEL Time commands, respectively. The Get SDR Time command can also be
used to read the timestamp clock. These commands are specified in the Intelligent Platform
Management Interface Specification, Version 1.5.
The mBMC SEL timestamp is initialized by the BIOS prior to booting to the operating system
using the IPMI command Set SEL Time.
After a mBMC reset, the mBMC sets the initial value of the timestamp clock to 0x00000000. It is
incremented once per second after that. A SEL event containing a timestamp from 0x00000000
to 0x140000000 has a timestamp value that is relative to mBMC initialization.
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C command if they require direct communication with a device on this bus.
mBMC Peripheral SMBus
Watchdog Timer
System Event Log (SEL)
SEL Erasure
Timestamp Clock
Intel order number C91056-002
Intel® Server Board SE7320VP2
Revision 2.1