ADWPCIXRSKU20 Intel, ADWPCIXRSKU20 Datasheet - Page 34

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ADWPCIXRSKU20

Manufacturer Part Number
ADWPCIXRSKU20
Description
Manufacturer
Intel
Datasheet

Specifications of ADWPCIXRSKU20

Lead Free Status / Rohs Status
Supplier Unconfirmed
Functional Architecture
DDR-266 and DDR-333 DIMM population rules are as follows:
DDR2 400 DIMM population rules are as follows:
The following tables show the supported memory configurations.
34
MCH
MCH
DIMM banks must be populated in order, starting with the slots furthest from MCH.
Single rank DIMMs must be populated before dual rank DIMMs.
A maximum of four DIMMs can be populated when all four DIMMs are dual rank DDR-
333 DIMMs.
DIMMs banks must be populated in order starting with the slots furthest from MCH.
Dual rank DIMMs are populated before single rank DIMMs.
A maximum of four DIMMs can be populated when all four DIMMs are dual rank
DDR2-400 DIMMs.
S/R = single rank
D/R = dual rank
E = empty
Table 4. Supported DDR-266 DIMM Populations
Table 5. Supported DDR-333 DIMM Populations
Bank 3 – DIMMs 3A, 3B
Bank 3 – DIMMs 3A, 3B
Intel order number C91056-002
D/R
D/R
D/R
D/R
S/R
S/R
E
E
E
E
E
E
E
E
E
E
Bank 2 – DIMMs 2A, 2B2
Bank 2 – DIMMs 2A, 2B
D/R
D/R
D/R
D/R
D/R
D/R
S/R
S/R
S/R
S/R
S/R
S/R
E
E
E
E
Intel® Server Board SE7320VP2
Bank 1 – DIMMs 1A, 1B
Bank 1 – DIMMs 1A, 1B
S/R
S/R
S/R
D/R
D/R
D/R
S/R
S/R
S/R
S/R
S/R
S/R
D/R
D/R
S/R
S/R
Revision 2.1