ADWPCIXRSKU20 Intel, ADWPCIXRSKU20 Datasheet - Page 35

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ADWPCIXRSKU20

Manufacturer Part Number
ADWPCIXRSKU20
Description
Manufacturer
Intel
Datasheet

Specifications of ADWPCIXRSKU20

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel® Server Board SE7320VP2
Notes:
3.3.3
ECC memory must be initialized by the BIOS before it can be used. The BIOS must initialize all
memory locations before using them. The BIOS uses the auto-initialize feature of the MCH to
initialize ECC. ECC memory initialization cannot be aborted and may result in a noticeable delay
in the boot process depending on the amount of memory installed in the system.
3.3.4
System memory is classified as base and extended memory. Base memory is memory that is
required for POST. Extended memory is the remaining memory in the system. Extended
memory may be contiguous or may have one or more holes. The BIOS memory test accesses
all memory except for memory holes.
Memory testing consists of separate base and extended memory tests. The base memory test
runs before video is initialized to verify memory required for POST. The BIOS enables video as
early as possible during POST to provide a visual indication that the system is functional. At
some time after video output has been enabled, BIOS executes the extended memory test. The
status of the extended memory test is displayed on the console. The status of base and
extended memory tests are also displayed on the LCD control panel if present.
Revision 2.1
MCH
On the Server Board SE7320VP2, when using all dual rank DDR-333 or DDR2-400
DIMMs, a total of four DIMMs can be populated. Configuring more than four dual rank
DDR-333 or DDR2-400 DIMMs will result in the BIOS generating a memory
configuration error.
Memory between 4GB and 4GB, minus 512MB, is not accessible for use by the
operating system and may be lost to the user. This area is reserved for BIOS, APIC
configuration space, PCI adapter interface, and virtual video memory space. This means
that if 4GB of memory is installed, 3.5GB of this memory is usable. The chipset should
allow the remapping of unused memory above the 4GB address, but this memory may
not be accessible to an operating system that has a 4GB memory limit.
ECC Memory Initialization
Memory Test
Table 6. Supported DDR2-400 DIMM Populations
Bank 3 – DIMMs 3A, 3B
Intel order number C91056-002
S/R
S/R
E
E
E
E
E
Bank 2 – DIMMs 2A, 2B
D/R
S/R
S/R
S/R
S/R
E
E
Functional Architecture
Bank 1 – DIMMs 1A, 1B
S/R
S/R
S/R
D/R
D/R
D/R
D/R
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