ADWPCIXRSKU20 Intel, ADWPCIXRSKU20 Datasheet - Page 96

• Manufacturer Part Number: ADWPCIXRSKU20
• Manufacturer: Intel

Specifications of ADWPCIXRSKU20

• Lead Free Status / Rohs Status: Supplier Unconfirmed

System BIOS
interrupt, or RTC alarm. The BIOS performs complete POST upon wake up from S4, and
initializes the platform.
The system can wake from the S1 state using a PS/2 keyboard, mouse, or USB device, in
addition to the sources described above.
The wake sources are enabled by the ACPI operating systems with cooperation from the
drivers; the BIOS has no direct control over the wakeup sources when an ACPI operating
system is loaded. The role of the BIOS is limited to describing the wakeup sources to the
operating system and controlling secondary control/status bits via the DSDT table.
The S5 state is equivalent to operating system shutdown. No system context is saved.
4.8.3
The BIOS supports a control panel power button. The power button is a request that is
forwarded by the mBMC to the ACPI power state machines in the chipset. It is monitored by the
mBMC and does not directly control power on the power supply.
The BIOS supports a control panel sleep button. The sleep button may not be provided on all
control panel designs. On systems where the sleep button is optional, a system configuration
option will be provided to enable or disable the sleep button. The ACPI tables will be updated to
indicate the presence or absence of the sleep button. Removal of the sleep button does not
prevent an ACPI OS from entering a sleep state.
The sleep button has no effect unless an operating system is running. If the operating system is
running, pressing the sleep button causes an event. The operating system will cause the
system to transition to the appropriate ACPI system state depending on the current user
settings.
The platform supports a control panel reset button. The reset button is a request that is
forwarded by the mBMC to the chipset. The BIOS does not affect the behavior of the reset
button.
The BIOS supports a control panel NMI button. The NMI button may not be provided on all
control panel designs. The NMI button is a request that causes the mBMC to generate an NMI
(non-maskable interrupt). The NMI is captured by the BIOS during Boot Services time or the
operating system during runtime. The BIOS will halt the system upon detection of the NMI.
4.8.3.1
The chipset may be configured to generate wakeup events for several different system events:
Wake on LAN, PCI Power Management Interrupt (PMI), and Real Time Clock Alarm are
examples of these events. The operating system will program the wake sources before
shutdown. A transition from either source results in the mBMC starting the power-up sequence.
Since the processors are not executing, the BIOS does not participate in this sequence. The
hardware receives power good and reset from the mBMC and then transitions to an On state.
96
Sleep and Wake Functionality
Power Switch Off to On
Intel order number C91056-002
Intel® Server Board SE7320VP2
Revision 2.1