ADWPCIXRSKU20 Intel, ADWPCIXRSKU20 Datasheet - Page 25

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ADWPCIXRSKU20

Manufacturer Part Number
ADWPCIXRSKU20
Description
Manufacturer
Intel
Datasheet

Specifications of ADWPCIXRSKU20

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel® Server Board SE7320VP2
3.1.6.6
The Intel
frequency. The BIOS reads the highest ratio register from all processors in the system. If all
processors are the same speed, the Actual Ratio register is programmed with the value read
from the High Ratio register. If all processors do not match, the highest common value between
High and Low Ratio is determined and programmed to all processors. If no value works for all
installed processors, all processors not capable of speeds supported by the bootstrap processor
(BSP) are disabled and an error is displayed.
3.1.6.7
IA-32 processors have the capability of correcting specific errata through the loading of an Intel-
supplied data block (microcode update). The BIOS is responsible for storing the update in
nonvolatile memory and loading it into each processor during POST. The BIOS performs the
recommended update signature verification prior to storing the update in the Flash.
3.1.6.8
The BIOS enables all levels of processor cache as early as possible during POST. There are no
user options to modify the cache configuration, size or policies. The largest and highest level
cache detected is reported in BIOS Setup.
3.1.6.9
Intel
that support this feature and enables the feature during POST. BIOS Setup provides an option
to selectively enable or disable this feature. The default behavior is enabled.
The BIOS creates additional entries in the ACPI MP tables to describe the virtual processors.
3.1.6.10
Intel
processor operating ratio and voltage similar to the Thermal Monitor 2 (TM2) feature. It must be
used in conjunction with the TM1 or TM2 feature. The BIOS implements the Intel SpeedStep
Technology feature in conjunction with the TM2 feature.
3.1.6.11
The system BIOS on the Server Board SE7320VP2 supports the Intel
Technology (Intel
enable or disable this support. The system will be in IA-32 compatibility mode when booting to
an operating system. Operating system specific drivers are then loaded to enable this capability.
Revision 2.1
®
®
Xeon
Xeon™ processors support the Intel SpeedStep
®
Xeon
TM
processors support Hyper-Threading Technology. The BIOS detects processors
Jumperless Processor Speed Settings
Microcode
Processor Cache
Hyper-Threading Technology
Intel SpeedStep
Intel
TM
®
processor does not utilize jumpers or switches to set the processor
EM64T) of the Intel
®
Extended Memory 64 Technology (Intel
®
Intel order number C91056-002
Technology
®
Xeon™ processors. There is no BIOS setup option to
®
Technology. This feature changes the
®
EM64T) Support
®
Extended Memory 64
Functional Architecture
®
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