CP2201-GM Silicon Laboratories Inc, CP2201-GM Datasheet - Page 84

IC ETH CTRLR SNGL-CHIP 28QFN

CP2201-GM

Manufacturer Part Number
CP2201-GM
Description
IC ETH CTRLR SNGL-CHIP 28QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2201-GM

Package / Case
48-TQFP, 48-VQFP
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
Parallel/Serial
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
75mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Ethernet Connection Type
1000BASE-T or 100BASE-T or 10BASE-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps or 100 Mbps or 1000 Mbps
Maximum Operating Temperature
+ 85 C
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
Parallel
Supply Current
60mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1326 - KIT REF DESIGN PWR OVER ETHERNET336-1316 - KIT EVAL FOR CP2201 ETH CTRLR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1313

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2201-GM
Manufacturer:
SiliconL
Quantity:
48
Part Number:
CP2201-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
CP2200/1
84
Bits 15–7:Reserved. Read = 000000000b; Must write 000000000b.
Bits 6–0: IPGT: Back-to-Back Inter-Packet Gap Register
Bit 15:
Bits 14–8:IPGR1: Non-Back-to-Back Inter-Packet Gap Part 1
Bit 7:
Bits 6–0: IPGR2: Non-Back-to-Back Inter-Packet Gap Part 2
Reserved
Reserved
Reserved
Bit15
Bit15
R/W
R/W
R/W
R/W
Bit7
Bit7
Indirect Register 4. IPGR: Non-Back-to-Back Inter-Packet Gap Register
Sets the minimum delay between the end of any transmitted packet and the start of a new packet.
In Full-Duplex mode, the register value should be set to the desired number of time units (each time
unit is 0.46 µs) minus 3. The recommended setting is 0x15 (21d), which yields 9.6 µs.
In Half-Duplex mode, the register value should be set to the desired number of time units (each time
unit is 0.46 µs) minus 6. The recommended setting is 0x12 (18d), which yields 9.6 µs.
Reserved. Read = 0b; Must write 0b.
Sets the optional carrier sense window referenced in IEEE 802.3 Section 4.2.3.2.1. The range of
values for this bit field are 0x00 to IPGR2. The recommended value is 0x0C.
Reserved. Read = 0b; Must write 0b.
Sets the Non-Back-to-Back Inter-Packet Gap. The recommended value is 0x12, which represents a
minimum inter-packet gap of 9.6 µs.
Indirect Register 3. IPGT: Back-to-Back Inter-Packet Gap Register
Bit14
Bit14
R/W
R/W
R/W
R/W
Bit6
Bit6
Bit13
Bit13
R/W
R/W
R/W
R/W
Bit5
Bit5
Bit12
Bit12
R/W
R/W
R/W
R/W
Bit4
Bit4
Reserved
IPGR1
IPGR2
IPGT
Bit11
Bit11
R/W
R/W
R/W
R/W
Bit3
Bit3
Rev. 1.0
Bit10
Bit10
R/W
R/W
R/W
R/W
Bit2
Bit2
R/W
R/W
R/W
R/W
Bit9
Bit1
Bit9
Bit1
R/W
R/W
R/W
R/W
Bit8
Bit0
Bit8
Bit0
Default Value
Default Value
MACADDR:
MACADDR:
0x0000
0x0000
0x02
0x03

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