ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 34

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ISP1761ET

Manufacturer Part Number
ISP1761ET
Description
USB Interface IC USB 2.0 HS OTG HOST
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1761ET

Operating Supply Voltage
1.65 V to 3.6 V
Lead Free Status / Rohs Status
 Details
Other names
ISP1761ET,557

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NXP Semiconductors
Table 13.
ISP1761_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HCCPARAMS - Host Controller Capability Parameters register (address 0008h) bit allocation
8.1.4 HCCPARAMS register
PRR
23
15
31
R
R
R
R
0
0
7
0
0
Table 12.
[1]
The Host Controller Capability Parameters (HCCPARAMS) register is a 4 bytes register,
and the bit allocation is given in
Bit
31 to 24
23 to 20
19 to 17
16
15 to 12
11 to 8
7
6 to 5
4
3 to 0
For details on register bit description, refer to
Universal Serial Bus Rev.
22
14
30
R
R
R
R
0
0
6
0
0
N_CC[3:0]
DPN[3:0]
reserved
Symbol
-
DPN[3:0]
-
P_INDICATOR
N_CC[3:0]
N_PCC[3:0]
PRR
-
PPC
N_PORTS[3:0]
HCSPARAMS - Host Controller Structural Parameters register (address 0004h) bit
description
21
13
29
R
R
R
R
0
0
5
0
0
Rev. 04 — 5 March 2007
1.0”.
Description
reserved; write logic 0
Debug Port Number: This field identifies which of the Host
Controller ports is the debug port.
reserved; write logic 0
Port Indicators: This bit indicates whether the ports support port
indicator control.
Number of Companion Controller: This field indicates the number
of companion controllers associated with this Hi-Speed USB Host
Controller.
Number of Ports per Companion Controller: This field indicates
the number of ports supported per companion Host Controller.
Port Routing Rules: This field indicates the method used to map
ports to the companion controllers.
reserved; write logic 0
Port Power Control: This field indicates whether the Host Controller
implementation includes port power control.
N_Ports: This field specifies the number of physical downstream
ports implemented on this Host Controller.
PPC
20
12
Table
28
R
R
R
R
0
0
4
1
0
reserved
[1]
13.
Ref. 2 “Enhanced Host Controller Interface Specification for
19
11
27
R
R
R
R
0
0
3
0
0
reserved
18
10
26
R
R
R
R
0
0
2
N_PORTS[3:0]
0
0
Hi-Speed USB OTG controller
N_PCC[3:0]
17
25
R
R
R
R
0
9
0
1
0
0
© NXP B.V. 2007. All rights reserved.
ISP1761
P_INDICAT
OR
34 of 163
16
24
R
R
R
R
0
8
0
0
1
0

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