R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1056

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
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Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
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Section 17 I
Page 1026 of 1448
No
Clear RDRF in ICSR
Clear STOP in ICSR
Set RIE = 1 in ICIER
Set RIE = 0 in ICIER
Read STOP in ICSR
2
STOP=1 ?
C Bus Interface 2 (IIC2)
Additional information: If only one byte is received, steps [2] through [6] are omitted following step [1],
Note: *
Yes
In slave receive mode, even if the actual and received slave addresses did not match,
received data are stored in ICDRR, after which the RDRF bit in ICSR is set.
Checking whether or not the addresses matched is thus required.
Figure 17.17 Sample Flowchart for Slave Receive Mode
and processing jumps to step [7]. Step [8] is ICDRR dummy read.
[12]
[13]
[14]
[15]
No
No
No
No
Set ACKBT=1 in ICIER
Set ACKBT=0 in ICIER
Dummy read ICDRR
Read RDRF in ICSR
Read RDRF in ICSR
Slave receive mode
Clear AAS in ICSR
Read AAS in ICSR
Read RDRF in ICSR
Last receive
Read ICDRR
Read ICDRR
RDRF=1 ?
Read ICDRR
RDRF=1 ?
RDRF=1 ?
AAS=1 ?
- 1?
End
Yes
No
Yes
Yes
Yes
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11
H8S/2427, H8S/2427R, H8S/2425 Group
[1] Determination of slave address*
[2] Clear the AAS flag.
[3] Set the acknowledge for the transmit device.
[4] Dummy read ICDRR.
[5] Wait the reception end of 1 byte.
[6] Check if the (last receive - 1).
[7] Read the received data.
[8] Set the acknowledge for the last byte.
[9] Read the received data of the (last byte - 1).
[10] Wait the reception end of the last byte.
[11] Read the received data of the last byte.
[12] Receive-data-full interrupt requests
[13] Determined by the stop condition
[14] Clear the RDRF and STOP flags.
[15] Receive-data-full interrupt requests
Use receive-data-full interrupts to determine
whether the slave address matches.
• If the slave address did match (AAS = 1),
• If the slave address did not match (AAS = 0),
are disabled.
detection flag.
are enabled.
execute steps [2] to [11].
execute steps [12] to [15].
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010

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