R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 138

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 5 Exception Handling
5.3.2
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
5.3.3
After reset release, MSTPCR is initialized to H'0FFF, EXMSTPCR is initialized to H'FFFF, and
all modules except the DMAC, EXDMAC, and DTC enter the module stop state.
Consequently, on-chip peripheral module registers cannot be read or written to. Register reading
and writing is enabled when the module stop state is exited.
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(1)(3) Reset exception handling vector address (when reset, (1)=H'000000, (3)=H'000002)
(2)(4) Start address (contents of reset exception handling vector address)
(5) Start address ((5)=(2)(4))
(6) First program instruction
Note: * Seven program wait states are inserted.
RES
RD
HWR, LWR
D15 to D0
Figure 5.2 Reset Sequence (Advanced Mode with On-chip ROM Disabled)
φ
Address bus
Interrupts after Reset
On-Chip Peripheral Functions after Reset Release
(1)
*
Vector fetch
(2)
High
*
(3)
(4)
Internal
processing
H8S/2427, H8S/2427R, H8S/2425 Group
Prefetch of first
program instruction
REJ09B0565-0100 Rev. 1.00
*
(5)
(6)
Jul 22, 2010