R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 369

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
Note:
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
2
1
0
Bit Name
IDLE
TEE
SAE
*
In common register enabled mode (DMCOMMD = 1): Setting DMAECRS0 or
DMAECRS2 is prohibited.
In common register disabled mode (DMCOMMD = 0): Setting DMAECRS2 or
DMAECRS3 is prohibited.
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Transfer End Pin Enable
Single Address Enable
Description
Idle Mode
Used in combination with the MDS bit in
DMACRS, selects sequential mode, idle mode, or
repeat mode as the mode in which transfer is to
be performed. For the setting, see the description
on the MDS bit.
[Clearing conditions]
•
•
•
[Setting conditions]
•
•
Enables or disables output from the transfer end
pin (TEND).
0: TEND pin output is disabled
1: TEND pin output is enabled*
Specifies whether the relevant channel is to be
used for transfer in dual address mode or single
address mode.
0: Dual address mode
1: Single address mode*
When initialization is performed
When 0 is written to the IDLE bit
When 0 is set by automatic transfer of the
setting information
When 1 is written to the IDLE bit
When 1 is set by automatic transfer of the
setting information
Section 8 DMA Controller (DMAC)
Page 339 of 1448