R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 825

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
12.4.3
Buffer operation, provided for channels 0, 3, 6, and 9, enables TGRC and TGRD to be used as
buffer registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or a compare match register.
Table 12.29 shows the register combinations used in buffer operation.
Table 12.29 Register Combinations in Buffer Operation
• When TGR is an output compare register
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Unit
0
1
Buffer register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 12.13.
Buffer Operation
Channel
0
3
6
9
Figure 12.13 Compare Match Buffer Operation
Compare match signal
Timer General Register
TGRA_0
TGRB_0
TGRA_3
TGRB_3
TGRA_6
TGRB_6
TGRA_9
TGRB_9
Timer general
register
Comparator
Section 12 16-Bit Timer Pulse Unit (TPU)
Buffer Register
TGRC_0
TGRD_0
TGRC_3
TGRD_3
TGRC_6
TGRD_6
TGRC_9
TGRD_9
TCNT
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