AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 1244

• Manufacturer Part Number: AT32UC3C0256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

39.6.8.6
39.6.8.7
Table 39-56. STATUS_INFO Contents
39.6.8.8
32117C–AVR-08/11
Bit number
15-9
4-1
8
7
6
5
0
BAUD_RATE
STATUS_INFO
MEMORY_SPEED
Name
Reserved
Reserved
Protected
SAB busy
Chip erase ongoing
CPU halted
Reset status
Table 39-54. MEMORY_READWRITE_STATUS Details
The current baud rate in the AW. See
Table 39-55. BAUD_RATE Details
A status message from AW.
Table 39-57. STATUS_INFO Details
Counts the number of RC120M clock cycles it takes to sync one message to the SAB interface
and back again. The SAB clock speed (
Response
Response value
Additional data
Response
Response value
Additional data
Response
Response value
Additional data
Description
The protection bit in the internal flash is set. SAB access is restricted. This bit
will read as one during reset.
The SAB bus is busy with a previous transfer. This could indicate that the CPU
is running on a very slow clock, the CPU clock has stopped for some reason
or that the part is in constant reset.
The Chip erase operation has not finished.
This bit will be set if the CPU is halted. This bit will read as zero during reset.
This bit will be set if AW has reset the CPU using the RESET command.
Details
0xC2
Status byte and byte count (2 bytes)
Details
0xC3
Baud rate
Details
0xC4
2 status bytes
Section 39.6.6.7
f
sab
f
sab
) can be calculated using the following formula:
=
---------------- -
CV 3
3f
aw
–
for more details.
AT32UC3C
1244