CD2231 Intel Corporation, CD2231 Datasheet - Page 105

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CD2231

Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
8.2.12
8.2.12.1
8.2.12.2
8.2.12.3
8.2.12.4
Datasheet
Register Name: RFAR1
Register Description: Receive Frame Address Register 1
Default Value: x’00
Access: Byte Read/Write
Register Name: RFAR2
Register Description: Receive Frame Address Register 2
Default Value: x’00
Access: Byte Read/Write
Register Name: RFAR3
Register Description: Receive Frame Address Register 3
Default Value: x’00
Access: Byte Read/Write
Register Name: RFAR4
Register Description: Receive Frame Address Register 4
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 7
Bit 7
Bit 7
Receive Frame Address Registers — HDLC Sync Mode Only
Receive Frame Address Register 1 (RFAR1)
Receive Frame Address Register 2 (RFAR2)
Receive Frame Address Register 3 (RFAR3)
Receive Frame Address Register 4 (RFAR4)
Reception of an HDLC frame can be qualified with a matched 1- or 2-byte address field either as
four 1-byte alternatives or two 2-byte alternatives. The use of RFAR registers for address
recognition is described in the Channel Option registers (COR1) on
Bit 6
Bit 6
Bit 6
Bit 6
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Bit 5
Bit 5
Bit 5
Bit 5
Frame Qualification Address 1
Frame Qualification Address 2
Frame Qualification Address 3
Frame Qualification Address 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 3
Bit 3
Bit 3
Bit 3
Bit 2
Bit 2
Bit 2
Bit 2
page
Motorola Hex Address: x’1D
Motorola Hex Address: x’1E
Motorola Hex Address: x’1F
Motorola Hex Address: x’1C
90.
Bit 1
Bit 1
Bit 1
Bit 1
Intel Hex Address: x’1C
Intel Hex Address: x’1D
Intel Hex Address: x’1E
Intel Hex Address: x’1F
Bit 0
Bit 0
Bit 0
Bit 0
105

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