CD2231 Intel Corporation, CD2231 Datasheet - Page 110
CD2231
Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
1.CD2231.pdf
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CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.3
8.3.1
8.3.1.1
8.3.1.2
110
Register Name: RBPR
Register Description: Receive BitRate Period
Default Value: x’81
Access: Byte Read/Write
Register Name: RCOR
Register Description: Receive Clock Option
Default Value: x’00
Access: Byte Read/Write
TLVal
Bit 7
Bit 7
Bit Rate and Clock Option Registers
Receive Baud Rate Generator Registers
Receive Baud Rate Period Register (RBPR)
This register contains the preload value for the receive baud rate counter. When using an internal
clock option or an n-times external clock, the preload value in conjunction with the receiver clock
source chosen, determines the receive bit rate. If a 1 external clock is used, a value of 01h must be
loaded in the RBPR.
Receive Clock Option Register (RCOR)
This register is used to select the DPLL mode, and the desired clock source for the receive bit rate
generator.
Bit 7
Bit 6
Bit 5
Bits 4:3
Bit 6
Bit 6
0
TLVal – Transmit line value
This bit reflects the logical value of the transmit data pin. It is a read-only bit; writing
to this bit has no effect.
Reserved – must be ‘0’.
DPLL enable
1 = DPLL is enabled
0 = DPLL is disabled
DPLL mode selects the type of data encoding used.
DpllEn
Bit 5
Bit 5
Receive bit rate period (divisor)
Dpllmd1
Bit 4
Bit 4
Dpllmd0
Bit 3
Bit 3
ClkSel2
Bit 2
Bit 2
Motorola Hex Address: x’C8
Motorola Hex Address: x’CB
ClkSel1
Bit 1
Bit 1
Intel Hex Address: x’CA
Intel Hex Address: x’C9
Datasheet
ClkSel0
Bit 0
Bit 0
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