L64724 LSI Logic Corporation, L64724 Datasheet - Page 194
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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8.2 AC Timing
8-6
This section presents AC timing information of the L64724. During AC
testing, HIGH inputs are driven to 3.0 V and LOW inputs are driven at
0 V. For transitions between HIGH, LOW, and invalid states, timing
measurements are made at 1.5 V, as shown in
Figure 8.1
Output
For 3-state outputs, timing measurements are made from the point at
which the output turns ON or OFF. An output is ON when its voltage is
greater than 1/2 V
voltage is less than V
Figure
Figure 8.2
Output
The timing parameters shown in Figures 8.3 through 8.7, refer to the
numbers in column 1 of Tables 8.6 through
L64724 Specifications
55 pF
Point
8.2.
Test
AC Test Load and Waveform for Standard Outputs
AC Test Load and Waveforms for 3-State Outputs
Point
Test
DD
C
I
I
ref
ref
L
or less than 0.5 V. An output is OFF when its
DD
= 15 pF
= 20 mA
= - 20 mA
– 0.5 V or greater than 0.5 V, as shown in
V
ref
= 1.5 V
V
ref
1.5 V
2.5 V
0.5 V
8.9.
Figure
8.1.
V
0.5 V
DD
– 0.5 V
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