L64724 LSI Logic Corporation, L64724 Datasheet - Page 217

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L64724

Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet

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B.1.1.5 Group 4, APR 26
B.1.1.6 PWRP Pin
Table B.1
The SCALE[7:0] parameter controls the internal signals DEMI and
DEMQ. It does not affect the loop itself, but it is related to PWR_REF by
Equation
Equation B.1
If PWR_REF = 84, SCALE = 186 (for E
Connect the L64724 PWRP output pin to 5 volts using a 470-ohm pullup
resistor. The PWRP pin is then connected to an RC loop filter with a time
constant of ~60 microseconds.
PWRP pin to the AGC circuit.
Figure B.1 AGC Loop Control
PWR
For more information on the AGC loop, see
Control (AGC),” page
L64724 QPSK Demodulator Acquisition and Debugging Tips
PWR_LVL Setting
SCALE
128
255
B.1.
0
=
2047
------------------------------------------------- -
PWR_LVL Register Setting
2 PWR REF
N
P
5 V
1
R ~ 470
+
5-20.
Amplification (dB)
------ -
N
E
s
o
1
–20
–40
0
Figure B.1
R
AGC
~ 2.7 K
s
/N
shows how to connect the
o
Section 5.8, “Automatic Gain
= 4 dB).
C
AGC
~ 22 nF
V
AGC
B-3

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