L64724 LSI Logic Corporation, L64724 Datasheet - Page 228

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

B-14
Group 4, APR 24 – Set to 0x54.
Set the PWR_REF[7:0] bits to 0x54. See
Power Reference,” page
Group 4, APR 25 – Set to 0x00.
Clear the D7 to D3 bits to 0. Clear the INT_DC bit (D2) to 0 to disable
internal DC offset compensation after the matched filter and clear the
PWR_BW[1:0] bits (D1 and D0) PWR_BW to 0 (see
“Power Control Loop,” page
Group 4, APR 26 – Set to 0xBA.
Use
Equation B.8
Group 4, APR 27 – Set to 0x64.
This register is set to a signal-to-noise threshold value dependent on the
value of the PWR_REF[7:0] value. The SNR_THS[7:0] bits contain a
threshold value that indicates a good or bad signal-to-noise ratio. Set the
SNR_THS[7:0] value to 100 (0x64.)
Group 4, APR 28 – Set to 0xAA.
This register defines the loop bandwidths for a particular baud rate (in the
equations that follow, the symbol T represents the baud period). A good
approximation to the equivalent noise bandwidth is given in
(for high data rates). The damping factor (
K
SNR of 4dB, K
values, we get L
L64724 Application Notes
digital
SCALE
SCALE
Equation B.8
x 0.78/32.0. K
=
=
2047
------------------------------------------------- -
2047
---------------------------------------------------- -
digital
2 PWR_REF
car
to calculate the value of SCALE[7:0].
= Fs/Fb = 50e6/21.3e6 = 2.34.
2 84
1
1
= 10, with the result that K
digital
+
+
2.51
------ -
N
E
5-20, for more details.
s
o
is chosen from
–
5-21.)
1
–
1
=
186
(0xBA)
Section 5.8.1, “ADC Range and
Table
is chosen as 1.0. K
dcar
5.4, on
= 0.24. Using these
Section 5.8.2,
page
Equation B.9
5-19. For a
dcar
=