L64724 LSI Logic Corporation, L64724 Datasheet - Page 39

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

3.4 Group 2: System Mode and System Status Registers
To access a Group 2, 3, or 4 register:
1. Initialize the APR with the address of the first register you want to
2. Read or write the first register within the register group you are
3. If the register is a 16-bit register, just perform another read or write
When you are through, the APR automatically points to the next register
in the group.
Group 2 contains two 32-bit registers, the System Mode Register (SMR)
and the System Status Register (STS). The System Mode Register is
accessed by writing the Group 2 address, and the System Status
Register is accessed by reading the Group 2 address. Because the
L64724 has an 8-bit architecture, each 32-bit register is accessed as four
8-bit registers.
The microprocessor accesses these registers by setting A[2:0] = 0b010.
It can access these registers at any point during Satellite Receiver
operation without interrupting the internal processing unit.
Group 2: System Mode and System Status Registers
access within a particular register group. You should write both bytes
of the APR.
accessing using the appropriate register group address. The
addresses are:
Group 2—0b010
Group 3—0b011
Group 4—0b100
Group 5—0b101
to the group register address to access the second byte. The APR
increments automatically.
Note:
The phase-locked loop must be locked (PCLK running) for
the status signals to be valid.
3-9