L64724 LSI Logic Corporation, L64724 Datasheet - Page 90
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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3.6.30 Carrier Synchronizer Sweep Rate (Group 4: APR 32 and 33)
3-60
RS Bit/Byte_Select
Errorout_Invert
SPI_On_Off
Reserved
Read/Write: R/W
CAR_SWR
L64724 Registers
APR
APR
32
33
Note:
D15
D7
The L64724 Revision B only supports modes 2 and 3 of the
SPI specification, NOT mode 1.
Reed Solomon Bit/Byte Select
The RS Bit/Byte_Select bit controls the Reed-Solomon
Corrected Bit Error Count/Byte Error Count selection.
When the bit is 1, reading the group 3 registers (APR0
and APR1) yields the Reed-Solomon byte error count.
When the bit is 0, reading the group 3 registers (APR0
and APR1) yields the Reed-Solomon bit error count,
which is the CEC multiplied by eight.
ERROROUT Signal Invert
When the Error_Out_Invert bit is 1, the ERROROUT
signal polarity is inverted from active-LOW to active-
HIGH.
When the SPI_On_Off bit is set to 1, the SPI mode is on.
When the bit is 0, the SPI mode is off. When setting this
bit, bit 4 of APR63 should also be set appropriately to
select the SPI mode.
Reserved
These bits are reserved.
Carrier Synchronizer Sweep Rate
The CAR_SWR[15:0] value determines the Carrier Syn-
chronizer sweep rate. For details, see
“Frequency Sweep Rate,” page 5-14.
a signed, two’s complement number.
CAR_SWR[15:8]
CAR_SWR[7:0]
CAR_SWR[15:0] is
Section 5.7.1.3,
[15:0]
D0
D8
[4:0]
7
6
5
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